S-8250BAB-I6T1U Datasheet, PDF (9/32 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR 1-CELL PACK

Rev.1.1_02
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8250B Series
2. Ta = −40°C to +85°C^*1
Table 9
(Ta = −40°C to +85°C^*1 unless otherwise specified)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
Detection Voltage
Overcharge detection voltage
Overcharge release voltage
Overdischarge detection voltage
VCU
VCL
VDL
−
VCL ≠ VCU
VCL = VCU
−
VCU − 0.045 VCU VCU + 0.030 V
1
VCL − 0.070 VCL
VCL + 0.040 V
1
VCL − 0.050 VCL
VCL + 0.030 V
1
VDL − 0.090 VDL
VDL + 0.060 V
2
Overdischarge release voltage
Discharge overcurrent detection voltage^*2
Load short-circuiting detection voltage
Discharge overcurrent release voltage
VDU
VDIOV
VSHORT
VDL ≠ VDU
VDL = VDU
VDD = 3.0 V
VDD = 3.4 V
VDD = 4.0 V
−
VRIOV
−
VDU − 0.140 VDU VDU + 0.110 V
2
VDU − 0.090 VDU VDU + 0.060 V
2
−
VDIOV
−
V2
−
VDIOV
−
V2
−
VDIOV
−
V2
VSHORT − 0.050 VSHORT VSHORT + 0.050 V
2
VDD − 1.4
VDD −
0.8
VDD − 0.3
V2
Charge overcurrent detection voltage
0 V Battery Charge Function
VCIOV
−
VCIOV − 0.015 VCIOV VCIOV + 0.015 V
2
0 V battery charge starting charger voltage V0CHA
0 V battery charge
function "available"
0.00
0.70
1.50
V2
0 V battery charge inhibition battery voltage V0INH
0 V battery charge
function "unavailable"
0.70
1.25
1.80
V2
Internal Resistance
Resistance between VM pin and VDD pin RVMD
−
Resistance between VM pin and VSS pin RVMS
−
Input Voltage
250
1000
3000
kΩ 3
7.2
20
44
kΩ 3
Operation voltage between VDD pin and
VSS pin
VDSOP1
−
1.5
−
6.5
V−
Operation voltage between VDD pin and
VM pin
VDSOP2
−
1.5
−
28
V−
Input Current
Current consumption during operation
IOPE
−
Current consumption during power-down IPDN
−
Current consumption during overdischarge IOPED
−
Output Resistance
−
2.0
4.5
μA 3
−
−
100
nA 3
−
−
2.0
μA 3
CO pin resistance "H"
CO pin resistance "L"
DO pin resistance "H"
DO pin resistance "L"
Delay Time
RCOH
−
RCOL
−
RDOH
−
RDOL
−
2.5
10
30
kΩ 4
2.5
10
30
kΩ 4
2.5
10
30
kΩ 4
2.5
10
30
kΩ 4
Overcharge detection delay time
tCU
−
tCU × 0.6
tCU
tCU × 1.6
−
5
Overdischarge detection delay time
tDL
−
tDL × 0.6
tDL
tDL × 1.6
−
5
Discharge overcurrent detection delay time tDIOV
−
tDIOV × 0.6
tDIOV
tDIOV × 1.6
−
5
Load short-circuiting detection delay time tSHORT
−
tSHORT × 0.5 tSHORT tSHORT × 1.7
−
5
Charge overcurrent detection delay time tCIOV
−
tCIOV × 0.6
tCIOV
tCIOV × 1.6
−
5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
*2. The temperature characteristics of VDIOV is determined depending on the setting of VDIOV, and accords closely with the
temperature characteristics of ON resistance of the charge-discharge control FET.
Refer to "2. 5 VDIOV vs. Ta" in " Characteristics (Typical Data)" for details.
9