S8209A Datasheet, PDF (4/22 Pages) Seiko Instruments Inc – A protection circuit with series multi-cell 2 cells or more

S-8209A Series Usage Guidelines
CMOS IC Application Note
Rev.1.5_00
1. 2 Operation
Following is about the operation of protection circuit with S-8209A for series multi-cell shown in Figure 1.
1. 2. 1 Normal status
Following is about the operation of S-8209A Series in the normal status.
The S-8209A goes in the normal status;
In the S-8209A (3), The CTLC3, CTLD3 pins are pulled down to the level of VSS3 pin, BAT3 is more than the
overdischarge detection voltage (V_DL) and less than the overdischarge detection voltage (V_CU). The CO3, DO3
pins get the level of VSS3 pin.
In the S-8209A (2), The CTLC2, CTLD2 pins are pulled down to the level of VSS3 pin by the CO3, DO3 pins,
BAT2 is more than V_DL and less than V_CU. The CO2, DO2 pins get the level of VSS2 pin.
In the S-8209A (1), The CTLC1, CTLD1 pins are pulled down to the level of VSS2 pin by the CO2, DO2 pins,
BAT1 is more than V_DL and less than V_CU. The CO1, DO1 pins get the level of VSS1 pin.
The status of each pin in the normal status is shown in Table 1.
Table 1
CTLC pin
CTLC3 = VSS3
CTLC2 = VSS3
CTLC1 = VSS2
CTLD pin
CTLD3 = VSS3
CTLD2 = VSS3
CTLD1 = VSS2
Status of battery
V_DL < BAT3 < V_CU
V_DL < BAT2 < V_CU
V_DL < BAT1 < V_CU
CO pin
CO3 = VSS3
CO2 = VSS2
CO1 = VSS1
DO pin
DO3 = VSS3
DO2 = VSS2
DO1 = VSS1
The S-8209A (1) in the normal status turns on the charge control FET (CFET) and the discharge control FET
(DFET) via transistors (Q_CO, Q_DO, N₁, N₂) externally set to each CO1 and DO1 pin. Therefore it is possible to
charge/discharge by a charger or a load connected between P+ and P−.
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Seiko Instruments Inc.