S-8424AAAFT-TB-X Datasheet, PDF (31/46 Pages) Seiko Instruments Inc – BATTERY BACKUP SWITCHING IC

Rev.3.0_01
BATTERY BACKUP SWITCHING IC
S-8424A Series
 Precautions
• In applications with small IRO or IOUT, the output voltages V_RO and V_OUT may rise, causing the load stability to
exceed standard levels. Set I_RO and I_OUT to 10 μA or more.
• Attach the proper capacitor to the VOUT pin to prevent the RESET voltage detector (which monitors the VOUT
pin) from coming active due to undershoot.
• Watch for overshoot and ensure it does not exceed the ratings of the IC chips and/or capacitors attached to the
VRO and VOUT pins.
• Add a 10 μF or more capacitor to the VOUT and VRO pins.
• When V_IN rises from the voltage more than V_SW1, a low pulse of less than 4 ms flows through the _PREEND pin
even when V_BAT is more than the _PREEND release voltage. Thus when monitoring the _PREEND pin, make
sure to take the 4 ms interval or more after the rise of V_IN.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
 Application Circuits
1. When Using Timer Micro controllers for Backup to display PREEND in the primary CPU
+
10 _μF
VOUT
100 kΩ
10 μF
+ ^VIN _S-8424A
Series ^CS
6V
1 kΩ
VBAT
PREEND
0.1 _μF
3V
+ ^VRO
RESET
10 μF
VSS
100 kΩ
100 kΩ
VCC
CS
Timer
microcontroller
RESET
VCC
RESET
Main CPU
INT
Address data
Figure 23 Application Circuit 1
31