S19110AXXA Datasheet, PDF (27/49 Pages) Seiko Instruments Inc – FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR

FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR
Rev.1.3_00
S-19110AxxA to S-19110HxxA Series
4. VDD pin, SENSE pin voltage glitch (reference)
4. 1 Detection operation
Figure 47 and Figure 48 show the relation between pulse width and pulse voltage difference (V_OD) where the
release status can be maintained when a pulse equal to or lower than the detection voltage (−V_DET) is input to the
VDD pin (VDD detection product) or SENSE pin (SENSE detection product) during release status.
Ta = −40°C to +125°C
Ta = −40°C to +125°C
200
1000
150
750
100
500
50
250
0
10
100
VOD [mV]
1000
0
10
100
VOD [mV]
1000
Figure 47 VDD Detection Product
Figure 48 SENSE Detection Product
VIH^*1
Pulse width
VDD, VSENSE VDET
VIL^*2
VOD
*1. V_IH = 16.0 V
*2. V_IL = −V_DET − V_OD
Figure 49 VDD Pin, SENSE Pin Input Voltage Waveform
Caution
Figure 47 and Figure 48 show the pulse conditions which can maintain the release status. If the
pulse whose pulse width and V_OD are larger than these conditions is input to the VDD pin (VDD
detection product) or SENSE pin (SENSE detection product), the OUT pin may change to a
detection status.
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