S35192A Datasheet, PDF (20/42 Pages) Seiko Instruments Inc – 3-WIRE REAL-TIME CLOCK

3-WIRE REAL-TIME CLOCK
S-35192A
Rev.3.2_02
 Low Power Supply Voltage Detection Circuit
The S-35192A has a low power supply voltage detection circuit, so that users can monitor drops in the power supply
voltage by reading the BLD flag (B1 in the status register 1). There is a hysteresis width of approx. 0.15 V (typ.) between
detection voltage and release voltage (refer to " Characteristics (Typical Data)"). The low power supply voltage
detection circuit does the sampling operation only once in one sec for 15.6 ms.
If the power supply voltage decreases to the level of detection voltage (V_DET) or less, "1" is set to the BLD flag so that
sampling operation stops. Once "1" is detected in the BLD flag, no sampling operation is performed even if the power
supply voltage increases to the level of release voltage or more, and "1" is held in the BLD flag.
Furthermore, the S-35192A does not initialize the internal circuit even if "1" is set to the BLD flag. If the BLD flag is "1"
even after the power supply voltage is recovered, the internal circuit may be in the indefinite status. In this case, be sure to
initialize the circuit. Without initializing, if the next BLD flag reading is done after sampling, the BLD flag gets reset to "0". In
this case, be sure to initialize although the BLD flag is in "0" because the internal circuit may be in the indefinite status.
V_DD
Detection voltage
Time keeping power
supply voltage (min.)
Hysteresis width
0.15 V approximately
Release
voltage
BLD flag reading
1s
1s
Sampling pulse
15.6 ms
Stop
Stop
Stop
BLD flag
Figure 21 Timing of Low Power Supply Voltage Detection Circuit
 Circuits Power-on and Low Power Supply Voltage Detection
Figure 22 shows the changes of the POC flag and BLD flag due to V_DD fluctuation.
VDD
Low power supply voltage
detection voltage
POC flag
Low power supply voltage
detection voltage
VSS
BLD flag
Status register 1
reading
20
Figure 22 POC Flag and BLD Flag