S-8262AAA-I8T1U Datasheet, PDF (18/36 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC

BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8262A Series
Rev.1.0_02
7. 0 V battery charge function "unavailable"
This function inhibits charging when a battery that is internally short-circuited (0 V battery) is connected. When the
battery voltage is the 0 V battery charge inhibition battery voltage (V_0INH) or lower, the charge control FET gate is
fixed to the EB− pin voltage to inhibit charging. When the battery voltage is V_0INH or higher, charging can be
performed.
Caution Some battery providers do not recommend recharging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge
function.
8. Delay circuit
The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter.
Remark
t_DIOV1 and t_DIOV2 start when V_DIOV1 is detected. Therefore, when V_DIOV2 is detected over t_DIOV2 after V_DIOV1,
the S-8262A Series turns the discharge control FET off during 0 ≤ t_D ≤ t_DIOV2 from the time of detecting
V_DIOV2.
V_DD
DO Pin
V_SS
VM Pin
V_DD
V_DIOV2
V_DIOV1
V_SS
t_DIOV2
t_D
0 ≤ t_D ≤ t_DIOV2
Time
Figure 9
Time
9. DP pin
The S-8262A Series has a DP pin (Test mode switching pin). The S-8262A Series becomes test mode by raising
the voltage which is input to the DP pin to V_DPH or higher.
DP Pin
Open (V_DP = V_SS)
"H" (V_DP ≥ V_DPH)
"L" (V_DP ≤ V_DPL)
Table 9
Status
Normal operation mode
Test mode
Normal operation mode
Under test mode, the overcharge detection delay time (t_CU) and the overcharge alarm release delay time (t_AL) are
shortened to 1 /128 of normal delay time.
Except during the above test of shortening delay time, set the DP pin OPEN or short-circuit it to V_SS. When the DP
pin is OPEN, it is pulled down to V_SS by the internal resistance.
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