S-24C256C Datasheet, PDF (17/35 Pages) Seiko Instruments Inc – Write protect function during the low power supply voltage

Rev.2.0_02_S
2-WIRE SERIAL E²PROM
S-24C256C
7. 2 Random read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the S-24C256C receives a 7-bit device address and a 1-bit read / write instruction code set to “0” following
a start condition, it responds with an acknowledge.
The S-24C256C then receives a upper 8-bit word address and responds with an acknowledge. And the
S-24C256C receives a lower 8-bit word address and responds with an acknowledge. The memory address is
loaded to the address counter in the S-24C256C by these operations. Reception of write data does not follow in a
dummy write whereas reception of write data follows in byte write and in page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device can
read the data starting from the arbitrary memory address by transmitting a new start condition and performing the
same operation in the current address read.
That is, when the S-24C256C receives a 7-bit device address and a 1-bit read / write instruction code set to “1”,
following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from the
S-24C256C in synchronous to the SCL clock. The master device outputs stop condition not an acknowledge, the
reading of S-24C256C is ended.
S
W
T
R
A
I
R
DEVICE
T
UPPER
T
ADDRESS E WORD ADDRESS
S
T
LOWER
A
R
WORD ADDRESS
T
R
E
DEVICE
A
ADDRESS D
NO ACK from
Master Device
S
T
O
DATA
P
SDA
LINE
1 0 1 0 A2 A1 A0 0
XX W14W13W12W11W10 W9W8 W7 W6 W5 W4 W3 W2 W1 W0
1 0 1 0 A2 A1 A0 1 D7 D下6図D5へD続4くD3 D2 D1 D0
M
LR A
A
S
S/ C
C
B
BW K
K
A
C
K
M
S
B
LR A
S/ C
BW K
DUMMY WRITE
Figure 17 Random Read
17