S-24CS01A Datasheet, PDF (15/47 Pages) Seiko Instruments Inc – 2-WIRE CMOS SERIAL E2PROM

Rev.4.4_00
2-WIRE CMOS SERIAL E²PROM
S-24CS01A/02A/04A/08A
6. 3 Write Protection
Write protection is available in the S-24CS01A/02A/04A/08A. When the WP pin is connected to the V_CC,
write operation to memory area is forbidden at all.
When the WP pin is connected to the GND, the write protection is invalid, and write operation in all
memory area is available.
Fix the level of the WP pin from the rising edge of SCL for loading the last write data (D0) until the end of
the write time (10 ms max.). If the WP pin changes during this time, the address data being written at this
time is not guaranteed.
There is no need for using write protection, the WP pin should be connected to the GND. The write
protection is valid in the operating voltage range.
t_WR
SCL
SDA
D0
Write Data
Acknowledge
Stop
Condition
WP
WP Pin Fixed Period
Start
Condition
Figure 15 WP Pin Fixed Period
6. 4 Acknowledge Polling
Acknowledge polling is used to know the completion of the write cycle in the E²PROM.
After the E²PROM receives a stop condition and once starts the write cycle, all operations are forbidden
and no response is made to the signal transmitted by the master device.
Accordingly the master device can recognize the completion of the write cycle in the E²PROM by
detecting a response from the slave device after transmitting the start condition, the device address and
the read/write instruction code to the E²PROM, namely to the slave devices.
That is, if the E²PROM does not generate an acknowledge, the write cycle is in progress and if the
E²PROM generates an acknowledge, the write cycle has been completed.
Keep the level of the WP pin fixed until acknowledge is confirmed.
It is recommended to use the read instruction "1" as the read/write instruction code transmitted by the
master device.
Seiko Instruments Inc.
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