S-19100N12A-M5T2U Datasheet, PDF (15/39 Pages) Seiko Instruments Inc – BUILT-IN DELAY CIRCUIT

FOR AUTOMOTIVE 125°C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.1.2_01
S-19100xxxA Series
 Explanation of Terms
1. Detection voltage (−VDET)
The detection voltage is a voltage at which the output in Figure 18 turns to "L". The detection voltage varies slightly
among products of the same specification. The variation of detection voltage between the specified minimum
(−VDET min.) and the maximum (−VDET max.) is called the detection voltage range (refer to Figure 16).
Example: In the S-19100C20A, the detection voltage is either one in the range of 1.938 V ≤ −VDET ≤ 2.062 V.
This means, at the operation temperature −40°C to +125°C, some S-19100C20A have −VDET = 1.938 V
and some have −VDET = 2.062 V.
2. Release voltage (+VDET)
The release voltage is a voltage at which the output in Figure 18 turns to "H". The release voltage varies slightly
among products of the same specification. The variation of release voltages between the specified minimum (+VDET
min.) and the maximum (+VDET max.) is called the release voltage range (refer to Figure 17). The value is
calculated from the actual detection voltage (−VDET) of a product and is in the range of −VDET × 1.03 ≤ +VDET ≤ −VDET
× 1.07.
Example: In the S-19100C20A, the release voltage is either one in the range of 1.997 V ≤ +VDET ≤ 2.206 V.
This means, at the operation temperature −40°C to +125°C, some S-19100C20A have +VDET = 1.997 V
and some have +VDET = 2.206 V.
V_DD
−V_DET max.
−V_DET min.
Detection voltage
Detection voltage
range
Release voltage
+V_DET max.
+V_DET min.
V_DD
Release voltage
range
OUT
Figure 16 Detection Voltage
OUT
Delay time
Figure 17 Release Voltage
V_DD
+ ^{VDD OUT}
V _{VSS CD}
C_D
R^*1
100 kΩ
+
V
*1. R is unnecessary for CMOS output product.
Figure 18 Test Circuit of Detection Voltage and Release Voltage
15