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S-8333CAAA-I8T1U Datasheet, PDF (14/44 Pages) Seiko Instruments Inc – PWM CONTROL SWITCHING REGULATOR CONTROLLER
STEP-UP, FOR LCD BIAS SUPPLY, 1-CHANNEL, PWM CONTROL SWITCHING REGULATOR CONTROLLER
S-8333 Series
Rev.4.2_01
Change in current (IL) flowing through the diode into VOUT during tOFF:
dIL
dt
=
VL
L
=
VOUT
+ VD
L
−
VIN
................................................................................................................. (6)
Integration of the above equation is as follows:
IL
= IPK
−  VOUT

+ VD
L
−
VIN
× t

.................................................................................................................. (7)
During tON, energy is stored in L and is not transmitted to VOUT. When receiving output current (IOUT) from VOUT,
the energy of the capacitor (CL) is used. As a result, the pin voltage of CL is reduced, and goes to the lowest level
after M1 is turned ON (tON). When M1 is turned OFF, the energy stored in L is transmitted via the diode to CL, and
the pin voltage of CL rises drastically. Because VOUT is a time function indicating the maximum value (ripple
voltage: Vp-p) when the current flowing through the diode into VOUT and the load current IOUT match.
Next, this ripple voltage is determined as follows.
IOUT vs t1 (time) from after tON, when VOUT reaches the maximum level:
IOUT
= IPK
−  VOUT

+ VD
L
− VIN
 × t1

............................................................................................................. (8)
∴ t1
=
(IPK
− IOUT)× 
VOUT
L
+ VD
−
VIN

........................................................................................................... (9)
When tOFF, IL = 0 (when the energy of the inductor is completely transmitted):
Based on equation (7),
 V OUT
L
+ VD
− V IN

=
t OFF
I PK
............................................................................................................ (10)
When substituting equation (10) for equation (9):
t1 =
tOFF
−

IOUT
IPK
 × tOFF
............................................................................................................................ (11)
Electrical charge ΔQ1 which is charged in CL during t1:
   ΔQ1 =
t
0
1I L
dt
= IPK
×
t1dt − VOUT
0
+ VD
L
−
VIN
×
t1tdt
0
= IPK × t1 − VOUT
+ VD
L
−
VIN
×
1
2
t
2
1
...................... (12)
When substituting equation (12) for equation (9):
∆ Q 1 = IPK
−
1
2
(IPK
−
I OUT
) × t1 = IPK
+ IOUT
2
×
t1 ........................................................................... (13)
A rise voltage (Vp-p) due to ΔQ1:
VP - P =
∆Q1
CL
=
1
CL
×

IPK
+ IOUT
2

×
t1
............................................................................................................ (14)
When taking into consideration IOUT consumed during t1 and ESR*1 (RESR) of CL:
VP −P
=
∆Q1
CL
=
1
CL
× 

IPK
+ IOUT
2
 ×

t1
+


IPK
+ IOUT
2


×
R
ESR
−
IOUT ×
CL
t1
............................................... (15)
*1. Equivalent Series Resistance
When substituting equation (11) for equation (15):
VP −P
=
(IPK − IOUT
2 IPK
)2
×
t OFF
CL
+ 

IPK
+ IOUT
2


×
R
ESR
............................................................................... (16)
Therefore to reduce the ripple voltage, it is important that the capacitor connected to the output pin has a large
capacity and a small ESR.
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