S-1165 Datasheet, PDF (13/23 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR

HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_00
S-1165 Series
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the V_SS level due to the internally divided
resistance of several hundreds kΩ between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 12. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to V_IN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table 5
Logic Type
A
A
B
B
ON/OFF Pin
“L”: Power on
“H”: Power off
“L”: Power off
“H”: Power on
Internal Circuits
Operating
Stopped
Stopped
Operating
VOUT Pin Voltage
Set value
V_SS level
V_SS level
Set value
Current Consumption
I_SS1
I_SS2
I_SS2
I_SS1
VIN
ON/OFF
VSS
Figure 12
„ Selection of Output Capacitor (C_L)
The S-1165 Series performs phase compensation using the internal phase compensator in the IC and the ESR
(Equivalent Series Resistance) of the output capacitor to enable stable operation independent of changes in the
output load. Therefore, always place a capacitor (C_L) of 2.2 μF or more between VOUT and VSS pins.
For stable operation of the S-1165 Series, it is essential to employ a capacitor whose ESR is within an optimum
range. Using a capacitor whose ESR is outside the optimum range (approximately 0.5 to 5 Ω), whether larger
or smaller, may cause an unstable output, resulting in oscillation. For this reason, a tantalum electrolytic
capacitor is recommended.
When a ceramic capacitor or an OS capacitor with a low ESR is used, it is necessary to connect an additional
resistor that serves as the ESR in series with the output capacitor. The required resistance value is
approximately 0.5 to 5 Ω, which varies depending on the usage conditions, so perform sufficient evaluation for
selection. Ordinarily, around 1.0 Ω is recommended.
Note that an aluminum electrolytic capacitor may increase the ESR at a low temperature, causing oscillation.
When using this kind of capacitor, perform thorough evaluation, including evaluation of temperature
characteristics.
Seiko Instruments Inc.
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