S-8254AAAFT-TB-X Datasheet, PDF (11/29 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC

Rev.5.2_00
BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK
S-8254A Series
4. 0 V Battery Charge Starting Charger Voltage (Product with 0 V Battery Charge Function), 0 V
Battery Charge Inhibition Battery Voltage (Product with 0 V Battery Charge Inhibition Function)
(Test circuit 4)
Either the 0 V battery charge starting charger voltage or the 0 V battery charge inhibition battery voltage
is applied to each product according to the 0 V battery charge function.
4. 1 0 V Battery Charge Starting Charger Voltage (V_0CHA) (Product with 0 V Battery Charge
Function)
The starting condition is V1 = V2 = V3 = V4 = 0 V for a product in which 0 V battery charging is
available. The COP pin voltage should be lower than V_0CHA max. − 1 V when the VMP pin voltage
V_VMP = V_0CHA max.
4. 2 0 V Battery Charge Inhibition Battery Voltage (V_0INH) (Product with 0 V Battery Charge
Inhibition Function)
The starting condition is V1 = V2 = V3 = V4 = V_0INH for a product in which 0 V battery charging is
inhibited. The COP pin voltage should be higher than V_VMP − 1 V when the VMP pin voltage V_VMP =
24 V.
5. Resistance between VMP and VDD, Resistance between VMP and VSS, VC1 Pin Current, VC2 Pin
Current, VC3 Pin Current, VC4 Pin Current, CTL pin Current “H”, CTL Pin Current “L”, SEL Pin
Current “H”, SEL Pin Current “L”, COP Pin Leakage Current, COP Pin Sink Current, DOP Pin
Source Current, DOP Pin Sink Current
(Test circuit 5)
V_VMP = V_SEL = V_DD, V_INI = V_CTL = V_SS, V1 = V2 = V3 = V4 = 3.5 V, and other pins left “open” (this status is
referred to as the initial status).
5. 1 Resistance between VMP and VDD (R_VMD)
The resistance between VMP and VDD (R_VMD) is obtained from R_VMD = V_DD / I_VMD using the current
value of the VMP pin (I_VMD) when V_VMP is V_SS after the initial status.
5. 2 Resistance between VMP and VSS (R_VMS)
The resistance between VMP and VSS (R_VMS) is obtained from R_VMS = V_DD / I_VMS using the current
value of the VMP pin (I_VMS) when V1 = V2 = V3 = V4 = 1.8 V after the initial status.
5. 3 VC1 Pin Current (I_VC1), VC2 Pin Current (I_VC2), VC3 Pin Current (I_VC3), VC4 Pin Current (I_VC4)
At the initial status, the current that flows through the VC1 pin is the VC1 pin current (I_VC1), the current
that flows through the VC2 pin is the VC2 pin current (I_VC2), the current that flows through the VC3 pin
is the VC3 pin current (I_VC3), and the current that flows through the VC4 pin is the VC4 pin current
(I_VC4).
5. 4 CTL pin Current “H” (I_CTLH), CTL Pin Current “L” (I_CTLL)
In the initial status, the current that flows through the CTL pin is the CTL pin current “L” (I_CTLL), after
that, when V_CTL = V_DD, the current that flows through the CTL pin is the CTL pin current “H” (I_CTLH).
5. 5 SEL Pin Current “H” (I_SELH), SEL Pin Current “L” (I_SELL)
In the initial status, the current that flows through the SEL pin is the SEL pin current “H” (I_SELH), after
that, when V_SEL = V_SS, the current that flows through the SEL pin is the SEL pin current “L” (I_SELL).
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