S-8200AAC-M6T1U Datasheet, PDF (11/36 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR 1-CELL PACK

Rev.4.0_02
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
8. Resistance between VM pin and VDD pin
(Test circuit 3)
RVMD is the resistance between VM pin and VDD pin under the set conditions of V1 = 1.8 V, V2 = 0 V.
9. Resistance between VM pin and VSS pin
(Test circuit 3)
RVMS is the resistance between VM pin and VSS pin under the set conditions of V1 = 3.4 V, V2 = 1.0 V.
10. CO pin resistance "H"
(Test circuit 4)
The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V,
V2 = 0 V, V3 = 3.0 V.
11. CO pin resistance "L"
(Test circuit 4)
The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.6 V,
V2 = 0 V, V3 = 0.4 V.
12. DO pin resistance "H"
(Test circuit 4)
The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V,
V2 = 0 V, V4 = 3.0 V.
13. DO pin resistance "L"
(Test circuit 4)
The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V,
V2 = 0 V, V4 = 0.4 V.
14. Overcharge detection delay time
(Test circuit 5)
The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases and
exceeds VCU under the set conditions of V1 = 3.4 V, V2 = 0 V.
15. Overdischarge detection delay time
(Test circuit 5)
The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases and
falls below VDL under the set conditions of V1 = 3.4 V, V2 = 0 V.
16. Discharge overcurrent detection delay time
(Test circuit 5)
The discharge overcurrent detection delay time (tDIOV) is the time needed for VDO to go to "L" after the voltage V2
increases and exceeds VDIOV under the set conditions of V1 = 3.4 V, V2 = 0 V.
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