S1155 Datasheet, PDF (10/28 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT

HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1155 Series
 Standard Circuit
Input
C_IN^*1
VIN
VOUT
ON/OFF
VSS
Output
C_L^*2
Rev.2.1_01
Single GND
GND
*1. C_IN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 4.7 μF or more can be used as C_L.
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constant.
 Condition of Application
Input capacitor (C_IN) : 4.7 μF or more
Output capacitor (C_L) : 4.7 μF or more
Caution
1. Set input capacitor (C_IN) and output capacitor (C_L) as C_IN = C_L.
2. Generally a series regulator may cause oscillation, depending on the selection of external parts.
Confirm that no oscillation occurs in the application for which the above capacitors are used.
 Selection of Input and Output Capacitors (C_IN, C_L)
The S-1155 Series requires an output capacitor between the VOUT pin and the VSS pin for phase compensation.
Operation is stabilized by a ceramic capacitor with an output capacitance of 4.7 μF or more over the entire
temperature range. When using an OS capacitor, a tantalum capacitor, or an aluminum electrolytic capacitor, the
capacitance must be 4.7 μF or more.
The values of output overshoot and undershoot, which are transient response characteristics, vary depending on the
value of output capacitor.
The required value of capacitance for the input capacitor differs depending on the application.
Set the value for input capacitor (C_IN) and output capacitor (C_L) as follows.
C_IN ≥ 4.7 μF
C_L ≥ 4.7 μF
C_IN = C_L
Caution
The S-1155 Series may oscillate if setting the value as C_IN ≥ 4.7 μF, C_L ≥ 4.7 μF, C_IN < C_L.
Define the values by sufficient evaluation including the temperature characteristics under the usage
condition.
10
Seiko Instruments Inc.