S-89110ANC-1A1-TFZ Datasheet, PDF (10/34 Pages) Seiko Instruments Inc – MINI ANALOG SERIES

MINI ANALOG SERIES CMOS OPERATIONAL AMPLIFIER
S-89110/89120 Series
Rev.3.1_01
 Test Circuit (Per Circuit)
1. Power supply voltage rejection ratio, input offset voltage
VDD
RF
R_S
−
+
RS
RF
VCMR = VDD / 2
• Power supply voltage rejection ratio (PSRR)
The power supply voltage rejection ratio (PSRR) can be
calculated by the following expression, with VOUT measured at
each VDD.
VOUT
Test conditions:
When VDD = 1.8 V: VDD = VDD1, VOUT = VOUT1,
When VDD = 5.0 V: VDD = VDD2, VOUT = VOUT2
PSRR = 20 log


^VOUT1
−
VDD1
VD₂D1_
−
−
VDD2
^VOUT2
−
VD₂D2_
× ^RF_R⁺_S^RS_{}
Figure 8
• Input offset voltage (VIO)
VIO =
^{VOUT − V}2^DD
×
RS
RF + RS
2. Common-mode input signal rejection ratio, common-mode input voltage range
VDD
RF
RS
−
+
RS
RF
VIN
VDD / 2
Figure 9
• Common-mode input signal rejection ratio (CMRR)
The common-mode input signal rejection ratio (CMRR) can be
calculated by the following expression, with VOUT measured at
each VIN.
VOUT
Test conditions:
When VIN = VCMR Max.: VIN = VIN1, VOUT = VOUT1,
When VIN = VDD / 2: VIN = VIN2, VOUT = VOUT2
CMRR = 20 log

VIN1 − VIN2
VOUT1 − VOUT2
× ^RF_R⁺_S^RS_{}
• Common-mode input voltage range (VCMR)
The common-mode input voltage range is the range of VIN in
which VOUT satisfies the common-mode input signal rejection
ratio specifications.
10