SE4110L Datasheet, PDF (1/2 Pages) SiGe Semiconductor, Inc. – GPS Receiver IC

SE4110L
GPS Receiver IC
Applications
ƒ High sensitivity / low power GPS and A-GPS
applications
ƒ Portable navigation devices, mobile phones and
GPS peripheral devices
ƒ Telematics equipment
Features
ƒ Single-conversion L1-band GPS radio with
integrated IF filter
ƒ Integrated LNA; 1.6 dB typ. noise figure
ƒ Low RF system noise figure; 2.3 dB typ.
ƒ Low 10 mA operating current with 2.7-3.3 V supply;
8 mA with internal LNA disabled
ƒ Standby current <10 µA
ƒ Fully Integrated PLL, compatible with 13, 16.368,
19.5 and 26 MHz reference frequencies
ƒ 2-bit SIGN & MAG Digital IF output
ƒ Integrated VCO and resonator
ƒ I/O supply range extends down to 1.7 V
ƒ 4 x 4 mm 24 pin QFN
ƒ Pb-free, RoHS compliant and Halogen-free
Ordering Information
Part No.
Package
Remark
SE4110L-R 24 Pin QFN Shipped in Tape & Reel
Product Description
The SE4110L is a highly integrated GPS receiver
offering high performance and low-power operation in a
wide range of low-cost applications. It is particularly
well-suited to mobile phone and high sensitivity L1-band
GPS and A-GPS systems.
The SE4110L includes an on-chip LNA and a low IF
receiver with a linear AGC and 2-bit analogue-to-digital
converter (ADC). The receiver incorporates a fully
integrated image reject mixer so no SAW filter is
required in many applications. There is also an on-chip
IF filter.
The SE4110L supports a wide range of reference
frequencies, addressing both traditional GPS systems
and emerging mobile phone applications. The
synthesizer is highly integrated requiring only two
passive components to implement an off-chip loop filter.
The SE4110L is optimized for the lowest possible
power consumption consistent with the very low
external component count.
The SE4110L incorporates current-controlled low-
spurious output buffers which may optionally be run
from a separate external supply to interface to low
voltage systems. The buffers supply sufficient current to
drive most baseband devices directly.
Functional Block Diagram
Optional
filter
LNA_OUT
MIX_IN
VAGC
LNA_IN
Buffer
LNA
IF Filter
~~~
-45°
+45°
AGC
Controller
ADC
I
Q
SE4110
Quadrature
÷2
VCO
~
Feedback
Divider
Phase/Frequency
Detector
Clock
select
Reference
Divider
Chip
control
VTUNE
~ Reference
Oscillator
/ Buffer
PLL Loop
Filter
XTAL1
XTAL2
AGC_DIS
MAG
SIGN
CLK_OUT
FREF2
FREF1
FREF0
RX_EN
OSC_EN
RVI
DST-00002 ƒ Rev 6.4 ƒ May-26-2009
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