DLR3416 Datasheet, PDF (4/6 Pages) OSRAM GmbH – Alphanumeric Intelligent Display Devices with Memory/Decoder/Driver

Display Blanking
Blank the display by loading a blank or space into each digit of
the display or by using the (BL) display blank input.
Setting the (BL) input low does not affect the contents of either
data or cursor memory. A flashing display can be achieved by
pulsing (BL). A flashing circuit can be constructed using a 555
a stable multivibrator. Figure 3 illustrates a circuit in which vary-
ing R2 (100K~10K) will have a flash rate of 1 Hz~10 Hz.
Figure 3. Flashing circuit using a 555
VCC=5.0 V
The display can be dimmed by pulsing (BL) line at a frequency
sufficiently fast to not interfere with the internal clock. The dim-
ming signal frequency should be 2.5 KHz or higher. Dimming
the display also reduces power consumption.
An example of a simple dimming circuit using a 556 is illus-
trated in Figure 4. Adjusting potentiometer R3 will dim the dis-
play by changing the blanking pulse duty cycle.
Figure 4. Flashing circuit using a 555
VCC=5.0 V
1
8
2
3
To BL
Pin on 4
Display
555
7
Timer
6
5
C4
0.01 µF
Figure 3a. Flashing (blanking) timing
R1
4.7 KΩ
R2
100 KΩ
C3
10 µF
1
0
~~ _{500 ms}
~~ _{2 Hz Blanking Frequency}
Figure 5. Internal block diagram
Rows 0 to 6
Blanking Pulse Width
≈50% Duty Factor
Display
1
8
2
3
To BL
Pin on 4
Display
555
7
Timer
6
5
C4
0.01 µF
Figure 4a. Flashing (blanking) timing
R1
4.7 KΩ
R2
100 KΩ
C3
10 µF
1
0
~~ _{500 ms}
~~ _{2 Hz Blanking Frequency}
Blanking Pulse Width
≈50% Duty Factor
Row Control Logic
&
Row Drivers
321 0
BL
Columns 0 to 19
OSC
÷128
Counter
÷7
Counter
Timing and Control Logic
RAM Read Logic
D6
D5
7 Bit ASCII Code
D4
RAM
D3
D2
Memory
Cursor
D1
Memory
D0
4 X 7 bit
4 X 1 bit
Row Decoder
ROM
128 X 35 Bit
ASCII
Character
Decode
4480 bits
Column Data
Address Lines
Cursor Memory Bits 0 to 3
Column Enable
Latches and
Column Drivers
WR
Write
A0
Address
A1
Decoder
CUE
2–4
DLR/DLO/DLG3416