TDA6812-5 Datasheet, PDF (13/32 Pages) Siemens Semiconductor Group – TV-Stereo Processor

TDA 6812-5
Characterstics
V_S = 12 V; T_A = 25 ^oC; AF-reference level 0 dB = 250 mVrms unless otherwise defined; in
accordance with test circuit 1.
I²C Bus preset:
Start - 84 - 01,3F - 02,3F - 00,00-03,1F - 04,88 - 05,10 - 06,12-07,12-08,12-09,00-Stop
Chip address - Vol _LSl 63 - Vol _LSr 63 - Vol _Pre 0 - Vol _HP 31 - Tone lin - Gain 0 dB - Switch byte I, II,
II, IV
The basic setting for each item in the specifications is always preset; the test conditions only state
settings that differ. Details in italics are for explanation of the hex codes, for switching bits only set
bits or functions are given.5
Parameter
Symbol
Limit Values
Unit
min. typ. max.
Current consumption I₃₂
58 85 mA
Signal Section
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Gain
Gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Gain
Gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
Max. gain
V_22-1
–2 0
2
dB
V_21-3
–2 0
2
dB
V_27-1
–2 0
2
dB
V_26-3
–2 0
2
dB
V_31-1
–2 0
2
dB
V_30-3
–2 0
2
dB
V_13-1
–2 0
2
dB
V_14-3
–2 0
2
dB
V_22-3
–2 0
2
dB
V_21-3
–2 0
2
dB
V_27-3
–2 0
2
dB
V_26-3
–2 0
2
dB
V_31-3
–2 0
2
dB
V_30-3
–2 0
2
dB
V_22-1
4
6
8
dB
V_27-1
4
6
8
dB
V_31-1
4
6
8
dB
V_13-3
–2 0
2
dB
V_13-1
4
6
8
dB
V_22-1
4
6
8
dB
V_21-3
4
6
8
dB
V_27-1
4
6
8
dB
V_26-3
4
6
8
dB
V_31-1
4
6
8
dB
V_30-3
4
6
8
dB
Test Condition
08,32; Stereo; V₁ = 0
08,32; Stereo; V₁ = 0
08,32; Stereo; V₁ = 0
08,32; Stereo; V₁ = 0
07,32; Stereo; V₁ = 0
07,32; Stereo; V₁ = 0
08,32; Stereo; V₃ = 0
08,32; Stereo; V₃ = 0
07,32; Stereo; V₃ = 0
06,32; Stereo; V₁ = 0
06,32; Stereo; V₃ = 0
09,01; 6 dB
09,01; 6 dB
09,01; 6 dB
09,01; 6 dB
09,01; 6 dB
09,01; 6 dB
Semiconductor Group
125