MGP3006X6 Datasheet, PDF (1/21 Pages) Siemens Semiconductor Group – GHz PLL with I2C Bus and Four Chip Addresses

GHz PLL with I²C Bus
and Four Chip Addresses
Features
q 1-chip system for MPU-control (I²C Bus)
q 4 programmable chip addresses
q Short pull-in time for quick channel switch-over
and optimized loop stability
q 3 high-current band switch outputs (20 mA)
q Software-compatible with SDA 3202 series
q Oxis III technology
MGP 3006X6
Bipolar IC
P-DSO-16-1
Type
MGP 3006X6
MGP 3006X6
Ordering Code
Q67000-H5113
Q67006-H5113
Package
P-DSO-16-1 (SMD)
P-DSO-16-1 Tape & Reel (SMD)
Combined with a VCO (tuner), the MGP 3006X6 device, with four hard-switched chip
addresses, forms a digitally programmable phase-locked loop for use in television sets
with PLL-frequency synthesis tuning. The PLL permits precise crystal-controlled setting
of the frequency of the tuner oscillator between 16 and 1300 MHz in increments of
62.5 kHz, and, with a 2.4-GHz prescaler 1/2, in the TV-SAT band in increments of
125 kHz. The tuning process is controlled by a microprocessor via an I²C Bus. The
I²C Bus noise immunity has been improved by a factor of 10 compared to the
SDA 3202-2, and the new crystal oscillator generates a sinusoidal signal, suppressing
the higher-order harmonics, which reduces the moiré noise considerably.
Semiconductor Group
1
04.93