HYM72V4005GS-50- Datasheet, PDF (1/11 Pages) Siemens Semiconductor Group – 4M x 72-Bit EDO-DRAM Module

4M × 72-Bit EDO-DRAM Module
(ECC - Module)
168 pin buffered DIMM Module
HYM 72V4005GS-50/-60
HYM 72V4015GS-50/-60
• 168 Pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module
for PC main memory applications
• 1 bank 4M x 72 organisation
• Optimized for ECC applications
• Extended Data Out (EDO)
• Performance:
tRAC
tCAC
tAA
tRC
tHPC
RAS Access Time
CAS Access Time
Access Time from Address
Cycle Time
EDO Mode Cycle Time
-50
50 ns
18 ns
30 ns
84 ns
20 ns
-60
60 ns
20 ns
35 ns
104 ns
25 ns
• Single + 3.3V (± 0.3V) supply
• CAS-before-RAS refresh, RAS-only-refresh
• Decoupling capacitors mounted on substrate
• All inputs, outputs and clock fully LVTTL & LVCMOS compatible
• 4 Byte interleave enabled, Dual Address inputs (A0/B0)
• Buffered inputs excepts RAS and DQ
• Parallel Presence detects
• Utilizes eighteen 4M × 4 -DRAMs and four BiCMOS buffers/line drivers
• Two versions : HYM 72V4005GS with TSOPII-components (4 mm thickness)
HYM 72V4015GS with SOJ-components (9 mm thickness)
• 4096 refresh cycles / 64 ms with 12 / 10 addressing
• Gold contact pad
• Double sided module with 25.35 mm (1000 mil) height
Semiconductor Group
1
5.96