TPS65983 Datasheet, PDF (68/114 Pages) Texas Instruments – USB Type-C and USB PD Controller, Power Switch, and High Speed Multiplexer

TPS65983
SLVSD93 – OCTOBER 2015
www.ti.com
9.3.19 Thermal Shutdown
The TPS65983 has both a central thermal shutdown to the chip and a local thermal shutdown for the power path
block. The central thermal shutdown monitors the temperature of the center of the die and disables all functions
except for supervisory circuitry and halts digital core when die temperature goes above a rising temperature of
TSD_MAIN. The temperature shutdown has a hysteresis of TSDH_MAIN and when the temperature falls back
below this value, the device resumes normal operation. The power path block has its own local thermal shutdown
circuit to detect an over temperature condition due to over current and quickly turn off the power switches. The
power path thermal shutdown values are TSD_PWR and TSDH_PWR. The output of the thermal shutdown
circuit is de-glitched by TSD_DG before triggering. The thermal shutdown circuits interrupt to the digital core.
9.3.20 Oscillators
The TPS65983 has two independent oscillators for generating internal clock domains. A 48-MHz oscillator
generates clocks for the core during normal operation and clocks for the USB 2.0 endpoint physical layer. An
external resistance is placed on the R_OSC pin to set the oscillator accuracy. A 100-kHz oscillator generates
clocks for various timers and clocking the core during low-power states.
9.4 Device Functional Modes
9.4.1 Boot Code
The TPS65983 has a Power-on-Reset (POR) circuit that monitors LDO_3V3 and issues an internal reset signal.
The digital core, memory banks, and peripherals receive clock and RESET interrupt is issued to the digital core
and the boot code starts executing. Figure 63 provides the TPS65983 boot code sequence.
The TPS65983 boot code is loaded from OTP on POR, and begins initializing TPS65983 settings. This
initialization includes enabling and resetting internal registers, loading trim values, waiting for the trim values to
settle, and configuring the device I²C addresses.
The unique I²C address is based on the customer programmable OTP, DEBUG_CTLX pins, and resistor
configuration on the I2C_ADDR pin.
Once initial device configuration is complete the boot code determines if the TPS65983 is booting under dead
battery condition (VIN_3V3 invalid, VBUS valid). If the boot code determines the TPS65983 is booting under
dead battery condition, the BUSPOWERZ pin is sampled to determine the appropriate path for routing VBUS
power to the system.
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