LHF80V07 Datasheet, PDF (5/42 Pages) Sharp Electrionic Components – Flash Memory 8M (1M × 8/512K × 16)

SHARP
LHF8OVO7
3
1 INTRODUCTION
This datasheet contains LH28F800BVB-TI’L90
specifications. Section 1 provides a flash memory
overview. Sections 2,3,4 and 5 describe the memory
organization and functionality. Section 6 covers electrical
specifications.
1.1 Features
Key enhancements of LH28F8OOBVB-TTL90 Smart3
Flash memory are:
*Smart3 Technology
*Enhanced Suspend Capabilities
*Boot Block Architecture
Please note following important differences:
l VPPLK has been lowered to 1.5V to support 2.7V-3.6V
block erase and word/byte write operations. The V,,
voltage transitions to GND is recommended for
designs that switch V,, off during read operation.
*To take advantage of Smart3 technology, allow V,,
and V,, connection to 2.7V-3.6V.
1.2 Product Overview
The LH28F800BVB-TTL90 is a high-performance 8M-bit
Smart3 Flash memory organized as lM-byte of 8 bits or
512K-word of 16 bits. The lM-byte/512K-word of data is
uranged in two 8K-byte/4K-word boot blocks, six SK-
Jytel4K-word parameter blocks and fifteen 64K-byte/32K-
word main blocks which are individually erasable in-
tystem. The memory map is shown in Figure 3.
Smart3 technology provides a choice of V,, and V,,
:ombinations, as shown in Table 1, to meet system
xrformance and power expectations. V,, at 2.7V-3.6V
:liminates the need for a separate 12V converter, while
V,,=12V maximizes block erase and word/byte write
performance. In addition to flexible erase and program
voltages. the dedicated V,, pin gives complete data
protection when VPplVPPLK.
Table 1. V,, and V,, Voltage Combinations Offered by
Smart3 Technoloav
LzJ
V,, Voitage
V,, Voltage
i
2.7V-3.6V
1 2.7V-3.6V, 11.4V-12.6V 1
Internal V,, and V,, detection Circuitry automatically
configures the device for optimized read and write
operations.
A Command User Interface (CUI) serves as the interface
between the system processor and internal operation of the
device. A valid command sequence written to the CUI
initiates device automation. An internal Write State
Machine (WSM) automatically executes the algorithms
and timings necessary for block erase and word/byte write
operations.
A block erase operation erases one of the device’s 32K-
word blocks typically within 0.51s (2.7V-3.6V V,,,
11.4V-12.6V V,,), 4K-word blocks typically within 0.3 1s
(2.7V-3.6V V,,, 11.4V-12.6V V,,) independent of other
blocks. Each block can be independently erased 100,000
times. Block erase suspend mode allows system software
to suspend block erase to read or write data from any other
block.
Writing memory data is performed in word/byte
increments of the device’s 32K-word blocks typically
within 12.6~~ (2.7V-3.6V V,,, 11.4V-12.6V V,,), 4K-
word blocks typically within 24.5~~ (2.7V-3.6V V,,,
11.4V-12.6V V,,). Word/byte write suspend mode
enables the system to read data or execute code from any
other flash memory array location.
Rev. 1.1