LH155BA Datasheet, PDF (33/51 Pages) Sharp Electrionic Components – 128-Segment and 64-Common Outputs LCD Driver IC with A Built-in RAM

LH155BA
4.11. Increment Control Register Set
D7
D6
D5
D4
D3
D2
D1
D0
CSB RS WRB RDB RE
1
0
1
0
* AIM AYI AXI
0
1
0
1
0
* mark means "Don't care".
(At the time of reset : (AIM, AYI, AXI) = 0H, read address : AH)
The increment mode is set up when accessing the
graphic display RAM.
(The graphic display RAM only)
By AIM, AYI, and AXI registers, the setting-up of
increment operation/non-operation for the X-
address counter and the Y-address counter every
write access or every read access to the graphic
display RAM is possible.
In setting to this control register, the increment
operation of address can be made without setting
successive addresses for writing data or for reading
data to the graphic display RAM from MPU.
After setting this register, be sure to set the X and
Y address registers.
Because it is not assuring the data of X and Y
address registers after setting increment control
registers, the increment control of X and Y
addresses by AIM, AYI and AXI registers is as
follows.
AIM
SELECTION OF INCREMENT TIMING
0 When writing to graphic display RAM or reading from graphic display RAM
1 Only when writing to graphic display RAM (read modify)
REFERENCE
q
w
q This is effective when subsequently writing and reading the successive address areas.
w This is effective in the case that, after reading and writing the successive address areas for every address,
the read data are modified to write.
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