LHF16J06 Datasheet, PDF (25/47 Pages) Sharp Electrionic Components – Flash Memory 16M (1M × 16 / 2M × 8)

sharp
LHF16J06
23
Start
Write 70H
Read Status
Register
0
SR.7=
1
Write 60H
Write 01H/F1H,
Block/Device Address
Read
Status Register
0
SR.7=
1
Full Status
Check if Desired
Set Lock-Bit
Complete
FULL STATUS CHECK PROCEDURE
Read Status Register
Data(See Above)
1
SR.3=
0
1
SR.1=
0
1
SR.4,5=
0
1
SR.4=
0
Set Lock-Bit Successful
V_CCW Range Error
Device Protect Error
Command Sequence
Error
Set Lock-Bit Error
Bus
Operation
Write
Read
Standby
Write
Write
Command
Comments
Read Status
Register
Data=70H
Addr=X
Status Register Data
Set
Block/Permanent
Lock-Bit Setup
Set
Block or Permanent
Lock-Bit Confirm
Check SR.7
1=WSM Ready
0=WSM Busy
Data=60H
Addr=X
Data=01H(Block),
F1H(Permanent)
Addr=Block Address(Block),
Device Address(Permanent)
Read
Status Register Data
Standby
Check SR.7
1=WSM Ready
0=WSM Busy
Repeat for subsequent lock-bit set operations.
Full status check can be done after each lock-bit set operation or after a sequence of
lock-bit set operations.
Write FFH after the last lock-bit set operation to place device in read array mode.
Bus
Operation
Standby
Standby
Standby
Command
Comments
Check SR.3
1=V_CCW Error Detect
Check SR.1
1=Device Protect Detect
Permanent Lock-Bit is Set
(Set Block Lock-Bit Operation)
Check SR.4,5
Both 1=Command Sequence Error
Standby
Check SR.4
1=Set Lock-Bit Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register command in cases
where multiple lock-bits are set before full status is checked.
If error is detected, clear the Status Register before attempting retry or other error recovery.
Figure 10. Set Block and Permanent Lock-Bit Flowchart
Rev. 1.26