LH28F800BJHE-PBTL90 Datasheet, PDF (21/47 Pages) Sharp Electrionic Components – 8M (x8/x16) Flash Memory

LHF80J05
19
Start
Write 70H
Read Status
Register
0
SR.7=
1
Write 20H
Write D0H,
Block Address
Read Status
Register
0
SR.7=
1
Full Status
Check if Desired
Block Erase
Complete
No
Suspend
Block Erase
Suspend Block
Erase Loop
Yes
FULL STATUS CHECK PROCEDURE
Read Status Register
Data(See Above)
1
SR.3=
0
1
SR.1=
0
1
SR.4,5=
0
1
SR.5=
0
Block Erase Successful
V_CCW Range Error
Device Protect Error
Command Sequence
Error
Block Erase Error
Bus
Operation
Write
Read
Standby
Write
Write
Command
Read Status
Register
Erase Setup
Erase
Confirm
Comments
Data=70H
Addr=X
Status Register Data
Check SR.7
1=WSM Ready
0=WSM Busy
Data=20H
Addr=X
Data=D0H
Addr=Within Block to be Erased
Read
Status Register Data
Standby
Check SR.7
1=WSM Ready
0=WSM Busy
Repeat for subsequent block erasures.
Full status check can be done after each block erase or after a sequence of
block erasures.
Write FFH after the last operation to place device in read array mode.
Bus
Operation
Command
Comments
Standby
Standby
Standby
Standby
Check SR.3
1=V_CCW Error Detect
Check SR.1
1=Device Protect Detect
Check SR.4,5
Both 1=Command Sequence Error
Check SR.5
1=Block Erase Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register Command in cases
where multiple blocks are erased before full status is checked.
If error is detected, clear the Status Register before attempting retry or other error recovery.
Figure 6. Automated Block Erase Flowchart
Rev. 1.27