LHF32J02 Datasheet, PDF (13/51 Pages) Sharp Electrionic Components – Flash Memory 32M (2M × 16/4M × 8)

SHARP
LHF32JO2
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11
3.7 Write
Writing commands to the CUI enable reading of device
data and identifier codes. They also control inspection and
clearing of the status register. When V,,=2.7V-3.6V and
VCCW=VCCWH1/2~
the CUI additionally controls block
erase, full chip erase, word/byte write and lock-bit
configuration.
The Block Erase command requires appropriate command
data and an address within the block to be erased. The Full
Chip Erase command requires appropriate command data
and an address within the device. The Word/Byte Write
command requires the command and address of the
location to be written. Set Permanent and Block Lock-Bit
commands require the command and address within the
device (Permanent Lock) or block within the device
(Block Lock) to be locked. The Clear Block Lock-Bits
command requires the command and address within the
device.
The CUI does not occupy an addressable memory
location. It is written when WE# and CE# are active. The
address and data needed to execute a command are latched
on the rising edge of WE# or CE# (whichever goes high
first). Standard microprocessor write timings are used.
Figures 18 and 19 illustrate WE# and CE# controlled write
operations.
4 COMMAND DEFINITIONS
When the V,, voltage IVCCWLK. Read operations from
the status register, identifier codes. or blocks are enabled.
Placing
VccWH1i2
on VCCW ^{enables successful block}
erase. full chip erase. word/byte write and lock-bit
configuration operations.
Device operations are selected by writing specific
commands into the CUI. Table 3 defines these commands.
Table 2.1. Bus Operations (BYTEI
Read Identifier Codes
Write
NOTES:
673
VI,
VI,
VI,
VIL
X
X
DIN
X
1. Refer to DC Characteristics. When VccwlVccwLK. memory contents can be read. but not altered. -
2. X can be V, or V,, for control pins and addresses, and VcCWLK or VCCWH,,2 for V,,,. See DC Characteristics for
VCCWLK voltages.
3. RY/BY# is V,, when the WSM is executing internal block erase, full chip erase, word/byte write or lock-bit configuration
algorithms. It is High Z during when the WSM is not busy, in block erase suspend mode (with word/byte write inactive).
word/byte write suspend mode or reset mode.
4. RP# at GND-cO.2V ensures the lowest power consumption.
5. See Section 4.2 for read identifier code data.
6. Command writes involving block erase, full chip erase, word/byte write or lock-bit configuration are reliably executed
when V ccw=VccwHt/q and Vcc=2.7V-3.6V.
7. Refer to Table 3 for vahd D,, during a write operation,
8. Never hold OE# low and WE# low at the same timing.
Rev. 1.25