LH28F320BFHG-PBTLZL Datasheet, PDF (12/36 Pages) Sharp Electrionic Components – 32M (x16) Flash Memory

LHF32FDK
10
Table 6. Command Definitions⁽¹¹⁾
Command
Bus
First Bus Cycle
Cycles
Req’d
Notes
Oper⁽¹⁾
Addr⁽²⁾
Data
Second Bus Cycle
Oper⁽¹⁾ Addr⁽²⁾ Data⁽³⁾
Read Array
Read Identifier Codes/OTP
Read Query
1
Write
PA
≥2
4 Write
PA
≥2
4 Write
PA
FFH
90H Read IA or OA ID or OD
98H Read
QA
QD
Read Status Register
2
Write
PA
70H Read
PA
SRD
Clear Status Register
1
Write
PA
50H
Block Erase
2
5 Write
BA
20H Write
BA
D0H
Full Chip Erase
2
5,9 Write
X
30H Write
X
D0H
Program
Page Buffer Program
2
5,6 Write
WA
40H or
10H
Write
WA
WD
≥ 4 5,7 Write
WA
E8H Write
WA
N-1
Block Erase and (Page Buffer)
Program Suspend
1
8,9 Write
PA
B0H
Block Erase and (Page Buffer)
Program Resume
1
8,9 Write
PA
D0H
Set Block Lock Bit
2
Write
BA
60H Write
BA
01H
Clear Block Lock Bit
2
10 Write
BA
60H Write
BA
D0H
Set Block Lock-down Bit
2
Write
BA
60H Write
BA
2FH
OTP Program
2
9 Write
OA
C0H Write
OA
OD
Set Partition Configuration Register 2
Write PCRC
60H Write PCRC
04H
NOTES:
1. Bus operations are defined in Table 5.
2. All addresses which are written at the first bus cycle should be the same as the addresses which are written at the second
bus cycle.
X=Any valid address within the device.
PA=Address within the selected partition.
IA=Identifier codes address (See Table 3 and Table 4).
QA=Query codes address. Refer to Appendix of LH28F320BF series for details.
BA=Address within the block being erased, set/cleared block lock bit or set block lock-down bit.
WA=Address of memory location for the Program command or the first address for the Page Buffer Program command.
OA=Address of OTP block to be read or programmed (See Figure 3).
PCRC=Partition configuration register code presented on the address A₀-A₁₅.
3. ID=Data read from identifier codes. (See Table 3 and Table 4).
QD=Data read from query database. Refer to Appendix of LH28F320BF series for details.
SRD=Data read from status register. See Table 10 and Table 11 for a description of the status register bits.
WD=Data to be programmed at location WA. Data is latched on the rising edge of WE# or CE# (whichever
goes high first) during command write cycles.
OD=Data within OTP block. Data is latched on the rising edge of WE# or CE# (whichever goes high first)
during command write cycles.
N-1=N is the number of the words to be loaded into a page buffer.
4. Following the Read Identifier Codes/OTP command, read operations access manufacturer code, device code, block lock
configuration code, partition configuration register code and the data within OTP block (See Table 3 and Table 4).
The Read Query command is available for reading CFI (Common Flash Interface) information.
5. Block erase, full chip erase or (page buffer) program cannot be executed when the selected block is locked. Unlocked
block can be erased or programmed when RST# is V_IH.
6. Either 40H or 10H are recognized by the CUI (Command User Interface) as the program setup.
7. Following the third bus cycle, input the program sequential address and write data of "N" times. Finally, input the any
valid address within the target block to be programmed and the confirm command (D0H). Refer to Appendix of
Rev. 2.44