LRS1338A Datasheet, PDF (1/36 Pages) Sharp Electrionic Components – Stacked Chip 8M Flash Memory and 2M SRAM

Data Sheet
LRS1338A
Stacked Chip
8M Flash Memory and 2M SRAM
FEATURES
• Flash memory and SRAM
• Stacked die chip scale package
• 48-pin TSOP (TSOP48-P-1014) plastic package
• Power supply: 2.7 V to 3.6 V
• Operating temperature: -40°C to +85°C
• Access time (MAX.):
– Flash memory: 120 ns
– SRAM: 85 ns
• Operating current (MAX.):
– Flash memory
– Read: 25 mA (t_CYCLE = 200 ns)
– Word write: 57 mA (F-V_CC ≥ 3.0 V)
– Block erase: 42 mA (F-V_CC ≥ 3.0 V)
– SRAM: 25 mA (t_CYCLE = 200 ns)
• Standby current²
– Flash memory: 20 µA MAX. (F-CE ≥ F-V_CC - 0.2 V,
F-RP ≤ 0.2 V, F-V_PP ≤ 0.2 V)
– SRAM:
– 40 µA MAX. (S-CE ≥ S-V_CC - 0.2 V)
– 0.6 µA TYP. (T_A = 25°C, S-V_CC = 3 V,
S-CE ≥ S-V_CC - 0.2 V)
• Fully static operation
• Three-state output
NOTES:
1. Block erase and word write operations of flash memory with
T_A < -30°C are not supported.
2. Total standby current is the summation of flash’s memory standby
current and SRAM’s one.
DESCRIPTION
The LRS1338A is a combination memory organized
as 524,288 × 16-bit flash memory and 262,144 × 8-bit
static RAM in one package. It is fabricated using silicon-
gate CMOS process technology.
PIN CONFIGURATION
48-PIN TSOP
S-A₁₆/F-A₁₅ 1
S-A₁₅/F-A₁₄ 2
S-A₁₄/F-A₁₃ 3
S-A₁₃/F-A₁₂ 4
S-A₁₂/F-A₁₁ 5
S-A₁₁/F-A₁₀ 6
S-A₁₀/F-A₉ 7
S-A₉/F-A₈ 8
S-OE 9
F-WE 10
F-RP 11
F-V_PP 12
S-V_CC 13
F-WP 14
F-A18 15
F-A17 16
S-A₈/F-A₇ 17
S-A₇/F-A₆ 18
S-A₆/F-A₅ 19
S-A₅/F-A₄ 20
S-A₄/F-A₃ 21
S-A₃/F-A₂ 22
S-A₂/F-A₁ 23
S-A₀ 24
TOP VIEW
48 S-A₁₇/F-A₁₆
47 I/O₁₅
46 I/O₇
45 I/O₁₄
44 S-CE
43 I/O₆
42 I/O₁₃
41 I/O₅
40 I/O₁₂
39 I/O₄
38 F-V_CC
37 I/O₁₁
36 I/O₃
35 I/O₁₀
34 I/O₂
33 I/O₉
32 I/O₁
31 S-WE
30 I/O₈
29 I/O₀
28 F-OE
27 GND
26 F-CE
25 S-A₁/F-A₀
LRS1338A-1
Figure 1. LRS1338A Pin Configuration
Data Sheet
1