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LH5PV16256 Datasheet, PDF (1/14 Pages) Sharp Electrionic Components – CMOS 4M (256K x 16) Pseudo-Static RAM
LH5PV16256 CMOS 4M (256K × 16) Pseudo-Static RAM
FEATURES
• 262,144 words × 16 bit organization
• Power supply: +3.0 ± 0.15 V
• Access time: 120 ns (MAX.)
• Cycle time: 190 ns (MIN.)
• Power consumption (MAX.):
126 mW (Operating)
94.5 µW (Standby = CMOS input level)
220.5 µW
(Self-refresh = CMOS input level)
• LVTTL compatible I/O
• Available for address refresh,
auto-refresh, and self-refresh modes
• 2,048 refresh cycles/32 ms
• Address non-multiple
• Available for byte write mode using UWE
and LWE pins
• Package:
44-pin, TSOP (Type II)
• Process: Silicon-gate CMOS
• Operating temperature: 0 - 70°C
• Not designed or rated as radiation
hardened
DESCRIPTION
The LH5PV16256 is a 4M bit Pseudo-Static RAM with
a 262,144 words × 16 bit organization.
PIN CONNECTIONS
44-PIN TSOP (Type II)
TOP VIEW
LWE 1
UWE 2
A0 3
A1 4
A2 5
A3 6
A4 7
A5 8
A6 9
A17 10
CS 11
A16 12
A15 13
A14 14
A13 15
A12 16
A11 17
A10 18
A9 19
A8 20
A7 21
CE 22
44 GND
43 I/O15
42 I/O14
41 I/O13
40 I/O12
39 I/O11
38 I/O10
37 I/O9
36 I/O8
35 VCC
34 VCC
33 RFSH
32 I/O7
31 I/O6
30 I/O5
29 I/O4
28 I/O3
27 I/O2
26 I/O1
25 I/O0
24 OE
23 GND
Figure 1. Pin Connections
5PV16256S-1
1