LH53B16R00 Datasheet, PDF (1/6 Pages) Sharp Electrionic Components – CMOS 16M (1M x 16/512K x 32) MROM

LH53B16R00
CMOS 16M (1M × 16/512K × 32) MROM
FEATURES
• 1,048,576 × 16 bit organization
(Word mode: W = V_IL)
524,288 × 32 bit organization
(Double Word mode: W = V_IH)
• Access time: 120 ns (MAX.)
Access time in page mode: 50 ns (MAX.)
• Supply current:
– Operating: 180 mA (MAX.)
– Standby: 300 µA (MAX.)
• TTL compatible I/O
• Three-state outputs
• Single +5 V power supply
• Static operation
• Package:
70-pin, 500-mil SSOP
• Others:
– Non programmable
– Not designed or rated as radiation
– hardened
– CMOS process (P type silicon
substrate)
DESCRIPTION
The LH53B16R00 is a 16M-bit CMOS mask ROM
(mask-programmable-read-only memory) organized as
1,048,576 × 16 bits (Word mode) or 524,288 × 32 bits
(Double Word mode). It is fabricated using silicon-gate
CMOS process technology.
PIN CONNECTIONS
70-PIN SSOP
TOP VIEW
A₀ 1
A₁ 2
A₂ 3
A₃ 4
A₄ 5
A₅ 6
V_CC 7
D₀ 8
D₁₆ 9
D₁ 10
D₁₇ 11
GND 12
V_CC 13
D₂ 14
D₁₈ 15
D₃ 16
D₁₉ 17
D₄ 18
D₂₀ 19
D₅ 20
D₂₁ 21
GND 22
V_CC 23
D₆ 24
D₂₂ 25
D₇ 26
D₂₃ 27
GND 28
A₆ 29
A₇ 30
A₈ 31
A₉ 32
A₁₀ 33
A₁₁ 34
A₁₂ 35
70 NC
69 NC
68 NC
67 W
66 OE
65 CE
64 GND
63 D₃₁/A_-1 (NOTE)
62 D₁₅
61 D₃₀
60 D₁₄
59 GND
58 V_CC
57 D₂₉
56 D₁₃
55 D₂₈
54 D₁₂
53 D₂₇
52 D₁₁
51 D₂₆
50 D₁₀
49 GND
48 V_CC
47 D₂₅
46 D₉
45 D₂₄
44 D₈
43 V_CC
42 NC
41 A₁₈
40 A₁₇
39 A₁₆
38 A₁₅
37 A₁₄
36 A₁₃
NOTE: D₃₁/A_-1 pin becomes LSB address input (A_-1) when the
W pin is set to be LOW in word mode, and data output
(D₃₁) when set to be HIGH in double word mode.
53B16R00-1
Figure 1. Pin Connections
1