LH5324C00 Datasheet, PDF (1/6 Pages) Sharp Electrionic Components – CMOS 24M (1.5M x 16) MROM

LH5324C00
CMOS 24M (1.5M × 16) MROM
FEATURES
• 1,572,864 × 16 bit organization
• Access time: 120 ns (MAX.)
• Supply current:
– Operating: 80 mA (MAX.)
– Standby: 100 µA (MAX.)
• TTL compatible I/O
• Three-state output
• Single +5 V Power supply
• Static operation
• When the address input at both A₁₉ and
A₂₀ is high level, outputs become high
impedance irrespective of CE or OE.
• Package:
42-pin, 600-mil DIP
• Others:
– Non programmable
– Not designed or rated as radiation
hardened
– CMOS process (P type silicon
substrate)
DESCRIPTION
The LH5324C00 is a 24M-bit mask-programmable
ROM organized as 1,572,864 × 16 bits. It is fabricated
using silicon-gate CMOS process technology.
PIN CONNECTIONS
42-PIN DIP
TOP VIEW
A₁₈ 1
A₁₇ 2
A₇ 3
A₆ 4
A₅ 5
A₄ 6
A₃ 7
A₂ 8
A₁ 9
A₀ 10
CE 11
GND 12
OE 13
D₀ 14
D₈ 15
D₁ 16
D₉ 17
D₂ 18
D₁₀ 19
D₃ 20
D₁₁ 21
42 A₁₉
41 A₈
40 A₉
39 A₁₀
38 A₁₁
37 A₁₂
36 A₁₃
35 A₁₄
34 A₁₅
33 A₁₆
32 A₂₀
31 GND
30 D₁₅
29 D₇
28 D₁₄
27 D₆
26 D₁₃
25 D₅
24 D₁₂
23 D₄
22 V_CC
Figure 1. Pin Connections
5324C00-1
1