LH532000B-1 Datasheet, PDF (1/8 Pages) Sharp Electrionic Components – CMOS 2M (256K x 8/128K x 16) MROM

LH532000B-1 CMOS 2M (256K × 8/128K × 16) MROM
FEATURES
• 262,144 words × 8 bit organization
(Byte mode)
131,072 words × 16 bit organization
(Word mode)
• Access time: 120 ns (MAX.)
• Power consumption:
Operating: 275 mW (MAX.)
Standby: 550 µW (MAX.)
• Mask-programmable control pin
(for 40-pin DIP/40-pin SOP):
Pin 1 = OE₁/OE₁/DC
Pin 12 = OE/OE
• Static operation
• TTL compatible I/O
• Three-state outputs
• Single +5 V power supply
• Packages:
40-pin, 600-mil DIP
40-pin, 525-mil SOP
48-pin, 12 × 18 mm² TSOP (Type I)
DESCRIPTION
The LH532000B-1 is a CMOS 2M-bit mask-program-
mable ROM organized as 262,144 × 8 bits (Byte mode)
or 131,072 × 16 bits (Word mode) that can be selected
by BYTE input pin. It is fabricated using silicon-gate
CMOS process technology.
PIN CONNECTIONS
40-PIN DIP
40-PIN SOP
TOP VIEW
OE₁/OE₁/DC 1
A₇ 2
A₆ 3
A₅ 4
A₄ 5
A₃ 6
A₂ 7
A₁ 8
A₀ 9
CE 10
GND 11
OE/OE 12
D₀ 13
D₈ 14
D₁ 15
D₉ 16
D₂ 17
D₁₀ 18
D₃ 19
D₁₁ 20
40 A₈
39 A₉
38 A₁₀
37 A₁₁
36 A₁₂
35 A₁₃
34 A₁₄
33 A₁₅
32 A₁₆
31 ^BYTE
30 GND
29 D₁₅/A_-1
28 D₇
27 D₁₄
26 D₆
25 D₁₃
24 D₅
23 D₁₂
22 D₄
21 V_CC
532000B1-1
Figure 1. Pin Connections for DIP and
SOP Packages
1