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LH531V00 Datasheet, PDF (1/6 Pages) Sharp Electrionic Components – CMOS 1M (128K x 8) MROM
LH531V00
CMOS 1M (128K × 8) MROM
FEATURES
• 131,072 words × 8 bit organization
• Access time: 100 ns (MAX.)
• Power consumption:
Operating: 275 mW (MAX.)
Standby: 550 µW (MAX.)
• Mask-programmable OE1/OE1/DC
• Fully-static operation
• TTL-compatible I/O
• Three-state outputs
• Single +5 V power supply
• Packages:
32-pin, 600-mil DIP
32-pin, 525-mil SOP
32-pin, 8 × 20 mm2 TSOP (Type I)
DESCRIPTION
The LH531V00 is a 1M-bit mask-programmable ROM
organized as 131,072 × 8 bits. It is fabricated using
silicon-gate CMOS process technology.
PIN CONNECTIONS
32-PIN DIP
32-PIN SOP
TOP VIEW
OE1/OE1/DC 1
A16 2
A15 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
D0 13
D1 14
D2 15
GND 16
32 VCC
31 NC
30 NC
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 D7
20 D6
19 D5
18 D4
17 D3
531V00-1
Figure 1. Pin Connections for DIP and
SOP Packages
32-PIN TSOP (Type I)
TOP VIEW
A11 1
A9 2
A8 3
A13
4
A14
5
NC 6
NC 7
VCC 8
OE1/OE1/DC 9
A16 10
A15 11
A12 12
A7 13
A6 14
A5 15
A4 16
32 OE
31 A10
30 CE
29 D7
28 D6
27 D5
26 D4
25 D3
24 GND
23 D2
22 D1
21 D0
20 A0
19 A1
18 A2
17 A3
531V00-2
Figure 2. Pin Connections for TSOP Package
1