LH530800A-Y Datasheet, PDF (1/6 Pages) Sharp Electrionic Components – CMOS 1M (128K x 8) 3 V-Drive MROM

LH530800A-Y _{CMOS 1M (128K × 8) 3 V-Drive MROM}
FEATURES
• 131,072 words × 8 bit organization
• Access times:
500 ns (MAX.) at 2.6 V ≤ V_CC < 4.5 V
150 ns (MAX.) at 4.5 V ≤ V_CC ≤ 5.5 V
• Low-power consumption:
Operating: 193 mW (MAX.)
Standby: 550 µW (MAX.)
• Static operation
• Three-state outputs
• Mask-programmable control pin:
Pin 24 = OE/OE
• Wide range power supply:
2.6 V to 5.5 V
• Packages:
32-pin, 600-mil DIP
32-pin, 525-mil SOP
DESCRIPTION
The LH530800A-Y is a 1M-bit mask-programmable
ROM organized as 131,072 × 8 bits. It is fabricated
using silicon-gate CMOS process technology.
PIN CONNECTIONS
32-PIN DIP
32-PIN SOP
NC 1
A₁₆ 2
A₁₅ 3
A₁₂ 4
A₇ 5
A₆ 6
A₅ 7
A₄ 8
A₃ 9
A₂ 10
A₁ 11
A₀ 12
D₀ 13
D₁ 14
D₂ 15
GND 16
TOP VIEW
32 Vcc
31 NC
30 NC
29 A₁₄
28 A₁₃
27 A₈
26 A₉
25 A₁₁
24 OE/OE
23 A₁₀
22 CE
21 D₇
20 D₆
19 D₅
18 D4
17 D₃
530800A-Y-1
Figure 1. Pin Connections for DIP and
SOP Packages
1