LH28F160S5-L Datasheet, PDF (1/55 Pages) Sharp Electrionic Components – 16 M-bit (2 MB x 8/1 MB x 16) Smart 5 Flash Memories (Fast Programming)

LH28F160S5-L/S5H-L
LH28F160S5-L/S5H-L 16 M-bit (2 MB x 8/1 MB x 16) Smart 5
Flash Memories (Fast Programming)
DESCRIPTION
The LH28F160S5-L/S5H-L flash memories with
Smart 5 technology are high-density, low-cost,
nonvolatile, read/write storage solution for a wide
range of applications, having high programming
performance is achieved through highly-optimized
page buffer operations. Their symmetrically-blocked
architecture, flexible voltage and enhanced cycling
capability provide for highly flexible component
suitable for resident flash arrays, SIMMs and
memory cards. Their enhanced suspend
capabilities provide for an ideal solution for code +
data storage applications. For secure code storage
applications, such as networking, where code is
either directly executed out of flash or downloaded
to DRAM, the LH28F160S5-L/S5H-L offer three
levels of protection : absolute protection with VPP at
GND, selective hardware block locking, or flexible
software block locking. These alternatives give
designers ultimate control of their code security
needs. The LH28F160S5-L/S5H-L are conformed
to the flash Scalable Command Set (SCS) and the
Common Flash Interface (CFI) specification which
enable universal and upgradable interface, enable
the highest system/device data transfer rates and
minimize device and system-level implementation
costs.
FEATURES
• Smart 5 technology
– 5 V VCC
– 5 V VPP
• High speed write performance
– Two 32-byte page buffers
– 2 µs/byte write transfer rate
• Common Flash Interface (CFI)
– Universal & upgradable interface
• Scalable Command Set (SCS)
• High performance read access time
LH28F160S5-L70
– 70 ns (5.0±0.25 V)/80 ns (5.0±0.5 V)
LH28F160S5H-L70
– 70 ns (5.0±0.25 V)/90 ns (5.0±0.5 V)
LH28F160S5-L10/S5H-L10
– 100 ns (5.0±0.5 V)
• Enhanced automated suspend options
– Write suspend to read
– Block erase suspend to write
– Block erase suspend to read
• Enhanced data protection features
– Absolute protection with VPP = GND
– Flexible block locking
– Erase/write lockout during power transitions
• SRAM-compatible write interface
• User-configurable x8 or x16 operation
• High-density symmetrically-blocked architecture
– Thirty-two 64 k-byte erasable blocks
• Enhanced cycling capability
– 100 000 block erase cycles
– 3.2 million block erase cycles/chip
• Low power management
– Deep power-down mode
– Automatic power saving mode decreases ICC
in static mode
• Automated write and erase
– Command user interface
– Status register
• ETOX^TM∗ V nonvolatile flash technology
• Packages
– 56-pin TSOP Type I (TSOP056-P-1420)
Normal bend/Reverse bend
– 56-pin SSOP (SSOP056-P-0600)⁵
[LH28F160S5-L]
– 64-ball CSP (FBGA064-P-0811)
– 64-pin SDIP (SDIP064-P-0750)⁵
∗ ETOX is a trademark of Intel Corporation.
5 Under development
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books,
etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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