LH28F020SU-N Datasheet, PDF (1/31 Pages) Sharp Electrionic Components – 2M (256K × 8) Flash Memory

LH28F020SU-N
2M (256K × 8) Flash Memory
FEATURES
• 256K × 8 Bit Configuration
• 5 V Write/Erase Operation (5 V V_PP)
– No Requirement for DC/DC Converter to
Write Erase
• 80 ns Maximum Access Time
• 16 Independently Lockable Blocks (16K)
• 100,000 Erase Cycles per Block
• Automated Byte Write/Block Erase
– Command User Interface
– Status Register
• System Performance Enhancement
– Erase Suspend for Read
– Two-Byte Write
– Full Chip Erase
• Data Protection
– Hardware Erase/Write Lockout during
Power Transitions
– Software Erase/Write Lockout
• Independently Lockable for Write/Erase on
Each Block (Lock Block and Protect
Set/Reset)
• 5 µA (TYP.) I_CC in CMOS Standby
• State-of-the-Art 0.55 µm ETOX™ Flash
Technology
• Packages
– 32-Pin, 525 mil. SOP Package
– 32-Pin, 1.2 mm × 8 mm × 20 mm
TSOP (Type I) Package
32-PIN TSOP
TOP VIEW
A₁₁
1
A₉
2
A₈
3
A₁₃
4
A₁₄
5
A₁₇
6
WE 7
V_CC
8
V_PP
9
A₁₆ 10
A₁₅ 11
A₁₂ 12
A₇ 13
A₆ 14
A₅ 15
A₄ 16
32 OE
31 A₁₀
30 CE
29 DQ₇
28 DQ₆
27 DQ₅
26 DQ₄
25 DQ₃
24 GND
23 DQ₂
22 DQ₁
21 DQ₀
20 A₀
19 A₁
18 A₂
17 A₃
28F020SUN80-1
Figure 1. TSOP Configuration
32-PIN SOP
TOP VIEW
V_PP
1
A₁₆
2
A₁₅
3
A₁₂
4
A₇
5
A₆ 6
A₅
7
A₄
8
A₃ 9
A₂ 10
A₁ 11
A₀ 12
DQ₀ 13
DQ₁ 14
DQ₂ 15
GND 16
32 V_CC
31 WE
30 A₁₇
29 A₁₄
28 A₁₃
27 A₈
26 A₉
25 A₁₁
24 OE
23 A₁₀
22 CE
21 DQ₇
20 DQ₆
19 DQ₅
18 DQ₄
17 DQ₃
28F020SUN80-20
Figure 2. SOP Configuration
1