SGM811_15 Datasheet, PDF (8/12 Pages) SG Micro Corp – Microprocessor Supervisory with Manual Reset Input

SGM811/812
APPLICATION INFORMATION
Manual Reset
The SGM811/SGM812 is equipped with a manual reset input
This input is designed to operate in a noisy environment where
unwanted glitches could be induced. These glitches could be
produced by the bouncing action of a switch contact, or where a
manual reset switch may be located some distance away from
the circuit (the cabling of which may pick-up noise).
The manual reset input is guaranteed to ignore logically valid
inputs that are faster than 100ns and to accept inputs longer in
duration than 10μs.
Very Accurate Reset Threshold
Because the SGM811/SGM812 can operate effectively even
when there are large degradations of the supply voltages, the
possibility of a malfunction during a power failure is greatly
reduced. Another advantage of the SGM811/SGM812 is its very
accurate internal voltage reference circuit. Combined, these
benefits produce an exceptionally reliable microprocessor
supervisory circuit.
V_CC
V_CC
SGM811
RESET
GND
Microprocessor Supervisory
with Manual Reset Input
Reset Output
On power-up and after VCC rises above the reset threshold, an
internal timer holds the reset output active for 240ms (typical).
This is intended as a power-on reset signal for the processor. It
allows time for both the power supply and the microprocessor to
stabilize after power-up. If a power supply brownout or
interruption occurs, the reset output is similarly activated and
remains active for 240ms (typical) after the supply recovers.
This allows time for the power supply and microprocessor to
stabilize.
The SGM811 provides an active low reset output ( RESET ) while
the SGM812 provides an active high output ( RESET ). During
power-down of the SGM811, the RESET output remains valid
(low) with V_CC as low as 1V. This ensures that the
microprocessor is held in a stable shutdown condition as the
supply falls and also ensures that no spurious activity can occur
via the microprocessor as it powers up.
Glitch Immunity
The SGM811/SGM812 contains internal filtering circuitry
providing glitch immunity from fast transient glitches on the
power supply line.
VCC
VREF
VREF
VREF
VREF
RESET
t1
t1
Figure 1. Ensuring a Valid RESET Output Down to V_CC = 0V
Ensuring A Valid Reset Output Down to V_cc
= 0V
When VCC falls below 1.0 V, the SGM811/SGM812’s RESET no
longer sinks current. Therefore, a high impedance CMOS logic
input connected to RESET may drift to undetermined logic
levels. To eliminate this problem, a 100kΩ resistor should be
connected from RESET to ground.
t1 = RESET Time = 240ms Typical
V_REF = _RESET Voltage Threshold
Figure 2. Power Fail RESET Timing
Interfacing to Other Devices Output
The SGM811/SGM812 is designed to integrate with as many
devices as possible. One feature of the SGM811/SGM812 is
the reset output, which is directly proportional to V_CC (this is
guaranteed only while VCC is greater than 1V). This enables the
part to be used with both 3V and 5V, or any nominal voltage
within the minimum and maximum specifications for VCC.
SG Micro Corp
8
www.sg-micro.com