SGM8541 Datasheet, PDF (7/14 Pages) SG Micro Corp – 1.1MHz, 42μA, Rail-to-Rail I/O CMOS Operational Amplifier

APPLICATION NOTES
Driving Capacitive Loads
The SGM854X can directly drive 250pF in unity-gain without
oscillation. The unity-gain follower (buffer) is the most sensitive
configuration to capacitive loading. Direct capacitive loading
reduces the phase margin of amplifiers and this results in ringing
or even oscillation. Applications that require greater capacitive
drive capability should use an isolation resistor between the
output and the capacitive load like the circuit in Figure 1. The
isolation resistor RISO and the load capacitor CL form a zero to
increase stability. The bigger the R_ISO resistor value, the more
stable V_OUT will be. Note that this method results in a loss of gain
accuracy because RISO forms a voltage divider with the RLOAD.
SGM8541
V_IN
R_ISO
V_OUT
C_L
Figure 1. Indirectly Driving Heavy Capacitive Load
An improvement circuit is shown in Figure 2, It provides DC
accuracy as well as AC stability. R_F provides the DC accuracy by
connecting the inverting signal with the output, C_F and R_Iso serve
to counteract the loss of phase margin by feeding the high
frequency component of the output signal back to the amplifier’s
inverting input, thereby preserving phase margin in the overall
feedback loop.
Power-Supply Bypassing and Layout
The SGM854X family operates from either a single +2.5V to
+5.5V supply or dual ±1.25V to ±2.75V supplies. For
single-supply operation, bypass the power supply V_DD with a
0.1µF ceramic capacitor which should be placed close to the
VDD pin. For dual-supply operation, both the VDD and the VSS
supplies should be bypassed to ground with separate 0.1µF
ceramic capacitors. 2.2µF tantalum capacitor can be added for
better performance.
V_DD
10µF
0.1µF
Vn
SGM8541
Vp
Vn
V_{OUT Vp}
V_DD
10µF
0.1µF
SGM8541
V_OUT
10µF
V_SS(GND)
0.1µF
V_SS
Figure 3. Amplifier with Bypass Capacitors
C_F
SGM8541
V_IN
R_ISO
C_L
R_F
V_OUT
R_L
Figure 2. Indirectly Driving Heavy Capacitive Load with DC
Accuracy
For no-buffer configuration, there are two others ways to
increase the phase margin: (a) by increasing the amplifier’s gain
or (b) by placing a capacitor in parallel with the feedback resistor
to counteract the parasitic capacitance associated with inverting
node.
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SGM8541/8542/8544