SGM89000 Datasheet, PDF (11/14 Pages) SG Micro Corp – Capless 2Vrms Line Driver

SGM89000
APPLICATION INFORMATION (continued)
PCB Layout Guide
Capless 2Vrms Line Driver
with Adjustable Gain
+INR 1
14 +INL
-INR 2
13 -INL
OUTR 3
12 OUTL
SGND 4 SGM89000 11 UVP
EN 5
PVSS 6
10 ^PGND
V_DD
0.1μF
9 ^PVDD
CN 7
8 CP
TSSOP-14
NOTE: 0.1μF decoupling capacitor must be close to PGND and PVDD pins; capacitor can be connected between PVDD and
PGND pins directly and then connect PGND pin to GND layer.
The reference PCB layout is shown in below:
Zoomed in:
SG Micro Corp
www.sg-micro.com
FEBRUARY 2017
11