SGM8051_17 Datasheet, PDF (10/20 Pages) SG Micro Corp – CMOS Operational Amplifiers

SGM8051/2/3/4/5
APPLICATION NOTES
Driving Capacitive Loads
The SGM8051 series are optimized for bandwidth and
speed, not for driving capacitive loads. Output
capacitance will create a pole in the amplifier’s
feedback path, leading to excessive peaking and
potential oscillation. If dealing with load capacitance is
a requirement of the application, the two strategies to
consider are (1) using a small resistor in series with the
amplifier’s output and the load capacitance and (2)
reducing the bandwidth of the amplifier’s feedback loop
by increasing the overall noise gain.
Figure 1 shows a unity gain follower using the series
resistor strategy. The resistor isolates the output from
the capacitance and, more importantly, creates a zero
in the feedback path that compensates for the pole
created by the output capacitance.
SGM8051
VIN
RISO
VOUT
CLOAD
Figure 1. Series Resistor Isolating Capacitive Load
Power-Supply Bypassing and Layout
The SGM8051 series operate from either a single 2.7V
to 5.5V supply or dual ±1.35V to ±2.75V supplies. For
single-supply operation, bypass the power supply +V_S
with a 0.1µF ceramic capacitor which should be placed
close to the +V_S pin. For dual-supply operation, both
the +V_S and the -V_S supplies should be bypassed to
ground with separate 0.1µF ceramic capacitors. 2.2µF
tantalum capacitor can be added for better
performance.
Good PC board layout techniques optimize
performance by decreasing the amount of stray
capacitance at the op amp’s inputs and output. To
decrease stray capacitance, minimize trace lengths
and widths by placing external components as close to
the device as possible. Use surface-mount components
whenever possible.
250MHz, Rail-to-Rail Output,
CMOS Operational Amplifiers
For the high speed operational amplifier, soldering the
part to the board directly is strongly recommended. Try
to keep the high frequency current loop area small to
minimize the EMI (electromagnetic interference).
+VS
10μF
0.1μF
+VS
10μF
0.1μF
VN
SGM8051
VP
VN
VOUT
VP
SGM8051
VOUT
10μF
-VS (GND)
0.1μF
-VS
Figure 2. Amplifier with Bypass Capacitors
Grounding
A ground plane layer is important for high speed circuit
design. The length of the current path in an inductive
ground return will create an unwanted voltage noise.
Broad ground plane areas will reduce the parasitic
inductance.
Input-to-Output Coupling
To minimize capacitive coupling, the input and output
signal traces should not be in parallel. This helps
reduce unwanted positive feedback.
SG Micro Corp
www.sg-micro.com
JUNE 2017
10