SGM721_16 Datasheet, PDF (10/21 Pages) SG Micro Corp – CMOS Operational Amplifiers

SGM721/2/3/4
APPLICATION NOTES
Driving Capacitive Loads
The SGM721/2/3/4 can directly drive 4700pF in
unity-gain without oscillation. The unity-gain follower
(buffer) is the most sensitive configuration to capacitive
loading. Direct capacitive loading reduces the phase
margin of amplifiers and this results in ringing or even
oscillation. Applications that require greater capacitive
driving capability should use an isolation resistor
between the output and the capacitive load like the
circuit in Figure 1. The isolation resistor R_ISO and the
load capacitor C_L form a zero to increase stability. The
bigger the R_ISO resistor value, the more stable V_OUT will
be. Note that this method results in a loss of gain
accuracy because R_ISO forms a voltage divider with the
R_LOAD.
SGM721
VIN
RISO
VOUT
CL
Figure 1. Indirectly Driving Heavy Capacitive Load
An improved circuit is shown in Figure 2. It provides DC
accuracy as well as AC stability. R_F provides the DC
accuracy by connecting the inverting input with the
output. C_F and R_ISO serve to counteract the loss of
phase margin by feeding the high frequency
component of the output signal back to the amplifier’s
inverting input, thereby preserving phase margin in the
overall feedback loop.
CF
SGM721
VIN
RISO
CL
RF
VOUT
RL
Figure 2. Indirectly Driving Heavy Capacitive Load with
DC Accuracy
For non-buffer configuration, there are two other ways
to increase the phase margin: (a) by increasing the
amplifier’s closed-loop gain or (b) by placing a
capacitor in parallel with the feedback resistor to
counteract the parasitic capacitance associated with
inverting node.
Power-Supply Bypassing and Layout
The SGM72x family operates from either a single +2.1V
11MHz, Rail-to-Rail I/O
CMOS Operational Amplifiers
to +5.5V supply or dual ±1.05V to ±2.75V supplies. For
single-supply operation, bypass the power supply +V_S
with a 0.1µF ceramic capacitor which should be placed
close to the +V_S pin. For dual-supply operation, both
the +V_S and the -V_S supplies should be bypassed to
ground with separate 0.1µF ceramic capacitors. 2.2µF
tantalum capacitor can be added for better
performance.
Good PC board layout techniques optimize
performance by decreasing the amount of stray
capacitance at the op amp’s inputs and output. To
decrease stray capacitance, minimize trace lengths and
widths by placing external components as close to the
device as possible. Use surface-mount components
whenever possible.
For the operational amplifier, soldering the part to the
board directly is strongly recommended. Try to keep the
high frequency current loop area small to minimize the
EMI (electromagnetic interfacing).
+VS
10μF
0.1μF
+VS
10μF
0.1μF
Vn
SGM721
Vp
Vn
VOUT
Vp
VOUT
SGM721
10μF
-VS(GND)
0.1μF
-VS
Figure 3. Amplifier with Bypass Capacitors
Grounding
A ground plane layer is important for SGM72x circuit
design. The length of the current path in an inductive
ground return will create an unwanted voltage noise.
Broad ground plane areas will reduce the parasitic
inductance.
Input-to-Output Coupling
To minimize capacitive coupling, the input and output
signal traces should not be in parallel. This helps
reduce unwanted positive feedback.
SG Micro Corp
10
www.sg-micro.com