UR7HCTS2-S840 Datasheet, PDF (9/16 Pages) Semtech Corporation – High-Performance, Low Power Touch Screen Controller/Digitizer

SERIAL PERIPHERAL INTERFACE (SPI) MODE
The Serial Peripheral Interface (SPI) is a synchronous bi-directional multi-slave protocol. In SPI mode, the
ScreenCoder^TM SPI/Serial acts as a slave device. The IC only supports transmission and doesn't support receiving.
SPI data transfer can be performed at a maximum clock rate of 500 KHz. The SDATA pin outputs data every time
the transfer clock changes from high to low level.
Protocol:
1. The UR7HCTS2-S840 asserts _ATN low to indicate that a mouse packet is waiting for transfer.
2. The Host asserts _SS low to indicate that it is ready to receive data. _SS low means the system selected SPI
ScreenCoder^TM SPI/Serial as its communication device.
3. On detecting _SS low, the IC enables the SPI interface and places data in the SPI data TX buffer. After a short
delay, the system supplies eight clocks to get the data from the IC. The minimum time t2 from _SS low to first SPI
clock is 50us.
4. When a byte is transferred successfully, the system has to wait a minimum of 50us to begin the clocks for next
byte transmission.
5. When the mouse package is transmitted, the system stops the SPI clock. If it needs to communicate with other
SPI devices, it has to wait for _ATN return to high. _ATN high means the SPI port of UR7HCTS2-S840 is now in high
Impedance State.
_ATN
_SS
SCLK
SDATA
1st 2nd
Byte Byte
t1
t2
t3
Last
Byte
t4
Figure 2: SPI Transmission Timing: (_SS toggles for every package).
Notes on the Protocol:
To assure the fast transmission, system must assert _SS low as soon as possible, see Figure 2. If the system is
ready to get data, it doesn't have to raise _SS between packages, see Figure 3.
Copyright Semtech 2000-2001
9
DOC7-TS2-S840-DS-102
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