XE1203F Datasheet, PDF (6/36 Pages) Semtech Corporation – 433 MHz / 868 MHz / 915 MHz Low-Power, Integrated UHF Transceiver

XE1203F
Symbol
Description
Conditions
Min
IIP3
Input intercept point
f1 = fLO + 1 MHz
f2 = fLO + 1.945 MHz
Mode A (*1)
-36
Mode B (*1)
-21
BBW
Base band filter bandwidth DSB
Programmable (*2)
-
-
ACR
Adjacent channel rejection
funw = fLO + 650 kHz
45
Pw= - 108dBm, mode A (*1)
BR
Bit rate
Programmable
1.2
RFOP
RF output power
Programmable
RFOP1
-3
RFOP2
+2
RFOP3
+7
RFOP4 +12
FR
Synthesizer frequency range
Programmable
433
Each range with its own
868
external components
902
TS_TR
Transmitter wake-up time
From oscillator enabled
-
TS_RE
Receiver Baseband wake-up time From oscillator enabled
-
TS_RSSI
RSSI wake-up time
From receiver enabled
-
TS_RSSIM
RSSI measurement time
TS_OS
Crystal oscillator wake-up time
Fundamental
-
3^rd overtone
-
TS_FEI
FEI wake-up time
-
TS_SYNC_AQ Time for synchronization of the Input power of –106 dBm
-
Barker decoder
Data rate = 1154 bits/s
Chip rate = 12.7 kcps
XTAL
Crystal oscillator frequency
From Rx enabled
Fundamental or 3^rd overtone
-
FSTEP
Frequency synthesizer step
Exact step is XTAL / 77 824
-
VTHR
RSSI equivalent input thresholds Mode A (*1)
Low range:VTHR1
-
VTHR2
-
VTHR3
-
High range:VTHR1
-
VTHR2
-
VTHR3
-
SPR
Spurious emissions in Rx mode
(*4)
-
SCK
Serial Clock frequency
VIH
Digital input level high (*3)
% VDD
75
VIL
Digital input level low (*3)
% VDD
-
VOH
Digital output level high
% VDD
75
VOL
Digital output level low
% VDD
-
Typ Max Unit
-33
-
-18
-
200
-
600
-
48
-
dBm
dBm
kHz
kHz
dBc
152.3
0
-
+5
-
+10
-
+15
-
-
435
-
870
-
928
150 250
0.5 0.8
-
1
0.5
0.3 0.5
2.5
-
2/BR
5
-
kbit/s
dBm
dBm
dBm
dBm
MHz
MHz
MHz
us
ms
ms
ms
ms
ms
ms
ms
39
-
500
-
-100
-
-95
-
-90
-
-85
-
-80
-
-75
-
-65
-
1
-
-
-
25
-
-
-
25
MHz
Hz
dBm
dBm
dBm
dBm
dBm
dBm
dBm
MHz
%
%
%
%
Table 3: Electrical Specifications
Notes:
(*1)
Mode A: High sensitivity mode; Mode B: High Linearity mode. As defined in Paragraph 4.1.1.
(*2)
An intermediate bandwidth of 300 kHz can also be selected by using additional settings described in section 5.2.8.
(*3)
Throughout this document, digital signal levels are named “high” or “1”, and “low” or “0”.
(*4)
SPR strongly depends on the design of the application board and the choice of the external components.
Values down to -70 dBm can be achieved with careful design.
© Semtech 2007
www.semtech.com
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