E749BPJ Datasheet, PDF (6/14 Pages) Semtech Corporation – Octal Pin Electronics Driver/Receiver

Edge749
EDGE HIGH-PERFORMANCE PRODUCTS
Application Information
Power Supplies
The Edge749 uses three power supplies – VDD, VCC
and VEE. VDD, typically +5V, is the digital supply for all
of the data inputs and outputs. VCC and VEE are the
analog power supplies for the DUT drivers and
comparators. VCC can range from +10V to +18V, and
must be greater than or equal to VDD. VEE is the negative
analog power and may vary from 0V to –3V.
The Edge749 has several power supply requirements to
protect the part in power supply fault situations, as well
as during power up and power down sequences. VCC
must remain greater than or equal to VDD at all times.
Both VCC and VDD must always be positive (above
ground), and VEE must always be negative (at or below
ground).
The three-Schottky diode configuration shown in Figure
5, used on a once-per-board basis, insures power supply
sequence and fault tolerance.
VCC
VDD
VCC and VEE, which power the DUT drivers and receivers,
should also be decoupled to GND with a .1 µF chip
capacitor in parallel with a .001 µF chip capacitor. A
VCC and VEE plane, or at least a solid power bus, is
recommended for optimal performance.
V_HIGH and V_LOW Decoupling
As the V_HIGH and V_LOW inputs are unbuffered and must
supply the driver output current, decoupling capacitors
for these inputs are recommended in proportion to the
amount of output current the application requires.
Expanding the Common Mode Range
Although the Edge749 can drive and receive 18 V swings,
these 18 V signals can be adjusted over an 21 V range.
By using programmable regulators V1 and V2 for the
VCC and VEE supplies (feasible because these two
analog power supplies do not supply driver output
current), the Edge749 I/O range can be optimized for a
variety of applications (see Figure 6).
1N5820 or
Equivalent
V1
VCC
VEE
Figure 5.
Power Supply Protection Scheme
Edge 749
VDD
V2
Power Supplies Decoupling
Figure 6.
VDD, which provides the digital power, should be
decoupled to GND with a .1 µF chip capacitor in parallel
with a .001 µF chip capacitor. The bypass capacitors
should be as close to the device as possible. Power and
ground planes are recommended to provide a low
inductance return path.
There are three rules which govern the supplies V1 and
V2:
1) +10V < V1 < +18V
2) –3V < V2 < 0V
3) (V1 – V2) < +18V.
 2000 Semtech Corp.
6
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