SH3000 Datasheet, PDF (5/24 Pages) Semtech Corporation – Low-Power Programmable Multifunction Support IC for Microcontrollers

SH3000 MicroBuddy™
SYSTEM MANAGEMENT
CPU Supervisor
The SH3000 has two supervisory functions that
manage the reset of the target processor, a low VDD
monitor (Brownout Detector) and a Watchdog Timer, see
Figure 1.
Both functions are integrated with the Clock
Management System to provide a more complete
system solution than the stand-alone components.
The SH3000 has both active high and active low reset
output pins. Both are driven strong to the active state
and weak to the inactive state. This eliminates the need
for external pull-ups and allows various reset sources to
be connected together in a wire-OR configuration. (This
makes it simple to set up a manual reset circuit.)
A set of flags in the register map indicates the
source of the reset to the system software.
Low VDD Reset
The SH3000 drives the reset pins active whenever
VDD is below the value of VBO, the brownout reset
threshold, programmable from 2.3 V to 4.3 V in average
steps of 33 mV, see Table 1.
Table 1. Programmable VBO Values
Parameter
Min Typ
VBO for min code
(000000)
2.27 2.3
VBO for max code
(111111)
4.2 4.3
Step resolution
25
33
Max Units
2.33 V
4.4 V
41
mV
The default VBO value is loaded on power-up from
the factory-programmed OTP nonvolatile memory. It
can be re-programmed at any time or it can be
permanently protected from any changes by setting the
VBO Lock flag or an OTP write-protect flag.
On power up both the active-high and active-low
reset signals are driven active. These outputs are
typically valid for a VDD level of at least 0.5 V, and
guaranteed to be valid for a VDD level of 1.0 V.
The reset outputs remain active until VDD rises and
stays above the level of (VBO + VHYST), where VHYST is
a small fixed amount of hysteresis, nominally 50 mV,
added to prevent nuisance reset activations (when VDD
slowly changes near the level of VBO and some noise or
power glitching is present).
At the level of (VBO + VHYST) the power supply is
considered valid. In case of the initial power-up, the
reset is then driven inactive once 6 ms of valid power
have elapsed. In the case of brownout, the reset is
released after a delay of 6 ms (but no less than 12 ms
from the beginning of the brownout).
Such a fast reset is possible because the SH3000
provides a fast-starting clock that is free of crystal start-
up time requirements. This gives the SH3000 an
advantage over most external reset circuits, which must
have a long reset pulse duration to accommodate long
and unpredictable crystal start-up times.
The SH3000 guarantees that a valid and stable
clock is available 2 ms before the reset signals are
negated, so that internal synchronous reset and
initialization of the target micro can proceed normally.
VDD Noise Filter
1
Temperature- ^{4.40 V} _VHIGH
compensated
Threshold
Voltage
Reference
2.30 V _VLOW
D/A
Lock Logic
6-bit Value
RESET
CLKOUT
Hysteresis
50mV TYP.
32kHz
Write-once
Initialization Logic
32kHz
PWROK
Reset Logic
&
Minimum
Duration Timer
UNDERFLOW 1→0
RESET
VDD
20K
20K
RST
11
NRST
10
7-bit Down Counter
÷ 256
÷ 128
Mode
Load
7-bit Watchdog
Timeout Value
Watchdog
Reload Control
Alternating Codes
Logic
0x5A / 0xC3
Figure 1. CPU Supervisor --- Low VDD / Brownout Detector, Watchdog, Reset logic & Drivers
From / To
Serial I/O
Copyright ©2003-2005 Semtech Corporation
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