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SC668 Datasheet, PDF (42/46 Pages) Semtech Corporation – 8 LED Light Management Unit Automatic Dropout Prevention , Ambient Light Sense Input, PWM Dimming, and 4 LDOs
SC668
Register Map (continued)
To prevent drop-out, the maximum LDO4 output setting
should be limited to:
VLDO4(MAX) = VIN(MIN) - [1.33 × ILDO4(MAX)],
where VIN(MIN) is the minimum battery voltage and ILDO4(MAX)
is the maximum load current of LDO4. LDO4 load current
includes current to the external photo-detection circuit.
ADC Falling Threshold (15h)
This register contains the value ADFALL. When ADOUT falls
below ADFALL and AD_AUTO = 1, backlight bank #1 changes
to the starting value in the bank #1 register (02h).
AD_F7 through AD_F0 [D7:D0]
These are the 8 bits of ADFALL. AD_F7 is the MSB, and AD_F0
is the LSB.
AD_O7 through AD_O0 [D7:D0]
These are the 8 bits of ADOUT. AD_O7 [D7] is the Most
Significant Bit (MSB), and AD_O0 [D0] is the Least
Significant Bit (LSB). Binary weights of these bits are
shown in Table 24.
Table 24 — ADOUT Bits [D7:D0]
Name
Bit
Binary Weight
AD_O7
D7
1/2
AD_O6
D6
1/4
AD_O5
D5
1/8
AD_O4
D4
1/16
AD_O3
D3
1/32
AD_O2
D2
1/64
AD_O1
D1
1/128
AD_O0
D0
1/256
To calculate the voltage at the ADC input, the weights of
only the bits set to one are summed together and multi-
plied by the voltage provided by LDO4. The result is equal
to the analog voltage applied to the ADI pin. For example,
if the value of register 13h reads ADOUT = 01111111,
and VLDO4 = 2.8V, the ADC input is at:
2.8 x (4-1 + 8-1 + 16-1 + 32-1 + 64-1 + 128-1 + 256-1) = 1.38V.
ADC Rising Threshold (14h)
This register contains the value ADRISE. When ADOUT rises
above ADRISE and AD_AUTO = 1, backlight bank #1 changes
to the target value in the bank #1 target register (06h).
AD_R7 through AD_R0 [D7:D0]
These are the 8 bits of ADRISE. AD_R7 is the MSB, and AD_R0
is the LSB.
ADP and OLE Functions (16h)
ADP (Automatic Drop-out Protection) and OLE (Other
Lighting Effects) are controlled with this register. ADP
applies to bank #1 only.
ADP ensures current matching in the LEDs by responding
to a low battery voltage. ADP limits the maximum back-
light current to a level which ensures that backlight LEDs
maintain matched currents. The ADP feature also prevents
the ripple on a low battery from inducing flicker in the
LEDs. As the battery voltage gradually proceeds lower,
ADP gradually dims the backlights. The normal backlight
brightness is restored after the battery is recharged by
writing a logic zero to the ADP_EN bit.
Bank #1 will try to resume the original backlight current
setting whenever ADP_EN = 0. Also, if any bank #1 current
sink is floating, the ADP_EN bit is cleared automatically.
Any write operations to change the following bit combi-
nations in register 01h will also cause bank #1 to resume
the original setting:
• DIS = 1, EN = 0, BANK1EN = 1
• DIS = 0, EN = 1, BANK1EN = 1
• DIS = 1, EN = 1, BANK1EN = 1
ADP_ACT Bit D6
This bit is a flag. A logic one indicates that ADP has been
activated. Once activated, the ADP is limiting the backlight
current. This flag bit is reset when ADP_EN = 0, or when
any bank#1 current sink is floating, or by writing any of
the following bit combinations in register 01h:
• DIS = 1, EN = 0, BANK1EN = 1
• DIS = 0, EN = 1, BANK1EN = 1
• DIS = 1, EN = 1, BANK1EN = 1
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