ECLAMP2398P Datasheet, PDF (4/8 Pages) Semtech Corporation – ESD/EMI Protection for Color LCD Interfaces

EClamp2398P
PROTECTION PRODUCTS
Applications Information
Device Connection
The EClamp2398P is comprised of eight identical
circuits each consisting of a low pass filter for EMI/RFI
suppression and dual TVS diodes for ESD protection.
The device is in a 16-pin SLP package. Electrical
connection is made to the 16 pins located at the
bottom of the device. A center tab serves as the
ground connection. The device has a flow through
design for easy layout. Pin connections are noted in
Figure 1. All path lengths should be kept as short as
possible to minimize the effects of parasitic inductance
in the board traces. Recommendations for the ground
connection are given below.
PRELIMINARY
Figure 1 - Pin Identification and Configuration
(Top Side View)
In 1 ¹
16 _{Out 1}
In 2
Out 2
In 3
Out 3
In 4
Gnd
Out 4
In 5
Out 5
In 6
Out 6
In 7
Out 7
In 8 ⁸
9 _{Out 8}
Ground Connection Recommendation
Parasitic inductance present in the board layout will
affect the filtering performance of the device. As
frequency increases, the effect of the inductance
becomes more dominant. This effect is given by
Equation 1.
Equation 1: The Impedance of an Inductor at
Frequency XLF
XLF(L, f ) = 2 * π * f * L
Where:
L= Inductance (H)
f = Frequency (Hz)
Via connections to the ground plane form rectangular
wire loops or ground loop inductance as shown in
Figure 2. Ground loop inductance can be reduced by
using multiple vias to make the connection to the
ground plane. Bringing the ground plane closer to the
signal layer (preferably the next layer) also reduces
ground loop inductance. Multiple vias in the device
ground pad will result in a lower inductive ground loop
over two exterior vias. Vias with a diameter d are
separated by a distance y run between layers sepa-
rated by a distance x. The inductance of the loop path
is given by Equation 2. Thus, decreasing distance x
and y will reduce the loop inductance and result in
better high frequency filter characteristics.
Pin
1-8
9 - 16
Center Tab
Identification
Input Lines
Output Lines
Ground
Figure 2 - Inductance of Rectangular Wire Loops
Ground
Via 1
Ground
Via 2
d
x
Signal Layer
Ground Layer
y
Layer
Equation 2: Inductance of Rectangular Wire Loop
[ [ ] ] [ ] LRECT(d, x, y) = 10.16 *10^−9 *
x * ln
2*y
d
+ y * ln
2*x
d
Where:
d = Diameter of the wire (in)
x = Length of wire loop (in)
y = Breath of wire loop (in)
 2006 Semtech Corp.
4
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