SX8650 Datasheet, PDF (30/56 Pages) Semtech Corporation – World’s Lowest Power & Smallest Footprint 4-wire Resistive Touchscreen Controller with 15kV ESD

SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
4.6.2. I2C Write Registers
The format for I2C write is given in Figure 28.
After the start condition [S], the SX8650 slave address (SA) is sent, followed by an eighth bit (W=‘0’) indicating a Write.
The SX8650 then Acknowledges [A] that it is being addressed, and the host sends 8-bit Command and Register address
consisting of the command bits ‘000’ followed by the SX8650 Register Address (RA).
The SX8650 Acknowledges [A] and the host sends the appropriate 8-bit Data Byte (WD0) to be written.
Again the SX8650 Acknowledges [A].
In case the host needs to write more data, a succeeding 8-bit Data Byte will follow (WD1), acknowledged by the slave [A].
This sequence will be repeated until the host terminates the transfer with the Stop condition [P].
S SA W A CR
A WD0 A WD1 A
WDn A P
Clock stretching
Optional
Optional
S:
SA:
W:
A:
CR:
WDn:
P:
Start condition
SX8650 Slave Address(7:1)
'0'
Acknowledge
'000' + Register Address(4:0)
Write Data byte(7:0), 0...n
Stop condition
From host to SX8650
From SX8650 to host
Figure 28. I2C write register
The register address increments automatically when successive register data (WD1...WDn) is supplied by the host. This
automatic increment can be used for the first 4 register addresses (see Table 8).
The correct sampling of the screen by the SX8650 and the host I2C bus traffic are events that might occur simultaneously.
The SX8650 will synchronize these events by the use of clock stretching if that is required. The stretching occurs directly
after the last received command bit (see Figure 28).
ACS Revision V2.15/October 2009
©2009 Semtech Corp.
Page 29
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