GS1662 Datasheet, PDF (30/73 Pages) Gennum Corporation – Integrated Cable Driver

contained in the TRS ID words of the received video data. Therefore, full
synchronization to the received video standard requires at least one complete video
frame.
Once synchronization has been achieved, the GS1662 will continue to monitor the
received TRS timing or the supplied H, V, and F timing information to maintain
synchronization. The GS1662 will lose all timing information immediately following loss
of H, V and F.
The H signal timing should also be configured via the H_CONFIG bit of the internal
IOPROC register as either active line based blanking or TRS based blanking.
Active line based blanking is enabled when the H_CONFIG bit is set LOW. In this mode,
the H input should be HIGH for the entire horizontal blanking period, including the EAV
and SAV TRS words. This is the default H timing used by the device.
The timing of these signals is shown in Figure 4-2.
PC LK
LU M A D A T A IN P U T
C H R O M A D A T A IN P U T
H
V
F
3FF
000
3FF
000
H S IG N A L T IM IN G :
000
000
X Y Z (EAV)
X Y Z (EAV)
H _C O N F IG = LO W
3FF
000
3FF
000
H _C O N F IG = H IG H
000
000
X Y Z (SAV)
X Y Z (SAV)
Figure 4-2: H:V:F Input Timing - HD 20-bit Input Mode
PC LK
M U L T IP LE X E D Y 'C bC r D A T A IN P U T
H
V
F
PC LK
M U L T IP LE X E D Y 'C bC r D A T A IN P U T
H
V
F
3FF
3FF
000
000
000
0 0 0 X Y Z (EAV) X Y Z (EAV)
H V F T IM IN G A T E A V
3FF
3FF
000
000
000
000
X Y Z (SAV) X Y Z (SAV)
H V F T IM IN G A T S A V
Figure 4-3: H:V:F Input Timing - HD 10-bit Input Mode
PCLK
C H R O M A D A T A IN P U T
LU M A D ATA IN P U T
H
V
F
3FF
000
000
X Y Z (EAV)
H S IG N A L T IM IN G :
H _C O N F IG = LO W
3FF
000
000
X Y Z (SAV)
H _C O N F IG = H IG H
Figure 4-4: H:V:F Input Timing - SD 20-bit Mode
GS1662 HD/SD-SDI Serializer with Complete SMPTE
Video Support
Data Sheet
53628 - 3
October 2010
30 of 73