SC4808A_16 Datasheet, PDF (21/31 Pages) Semtech Corporation – High Performance Dual Ended PWM Controller

SC4808A/B
POWER MANAGEMENT
Application Information (Cont.)
SOFT START
START UP SEQUENCE
During start up of the converter, the discharged output ca-
pacitor and the load current have large supply current re-
quirements. To avoid this a soft start scheme is usually
implemented where the duty cycle of the regulator is gradu-
ally increased from 0% until the soft start duration is
elapsed.
SC4808 has an internal soft start circuit that limits the
duty cycle for a duration approximated by the formula be-
low. Also the soft start circuitry is activated if an over cur-
rent condition occurs. After an over current condition, OUTA
and OUTB are disabled and kept low for a duration of about
140µs. After the delay, the OUTA and OUTB are enabled
while the soft start limits the duty cycle. If the over current
condition persists, the soft start cycle repeats indefinitely.
Approximate internal soft start duration can be calculated
as below:
T _SoftStart
( ) _â‰
Ramp _SoftStart
×


VREF
2



R _Internal
R _CS
_ SlopeComp
_ to _ GND
+ 1 _{}
Initially during the power up, the SC4808 is in under volt-
age lock out condition. As the Vcc supply exceeds the UVLO
limit of the SC4808, the internal reference, oscillator, and
logic circuitry are powered up.
The OUTA and OUTB drivers are not enabled until the line
under voltage lock out limit is reached. At that point, once
the FB pin is above 1.5V, soft start circuitry starts the out-
put drivers, and gradually increases the duty cycle from
0%. The soft start duration is internally set (see formula in
Soft Start section).
As the output voltage starts to increase, the error signal
from the error amplifier starts to decrease. If isolation is
required, the error amplifier output can drive the LED of
the opto isolator. The output of the opto is connected in a
common emitter configuration with a pull-up resistor to a
reference voltage connected to the FB pin of the SC4808.
The voltage level at the FB pin provides the duty cycle nec-
essary to achieve regulation.
If an over current condition occurs, the outputs are dis-
abled and after a soft start delay time of about 100µs, the
softstart sequence mentioned above is repeated.
If longer soft start durations are required, the simple exter-
nal circuit shown below can be implemented.
REF
R37
1k
6
C40
NA
5
MOCD207
Csoft start
56.2K
REF
C26
2.2u,16V
VCC
R27
15k
C31
200p
U4
5 _REF
GND ⁶
4 _FB
OUTB ⁷
3 _CS
OUTA ⁸
2 _RC
VCC ⁹
1 _SYNC
LUVLO ¹⁰
R28
10
C33
0.1u,25V
SC4808
SYNC
56.2k
10k
Vin
R23
R33
Approximate soft start duration can be calculated as be-
low:
T_SoftStart ≅ C_SoftStart × R37
 2005 Semtech Corp.
21
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